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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-03-28 23:46:45 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-04-01 11:36:00 +0200
commitdeb2cb27e9bade18c4d186899edfaeabfc1131bd (patch)
tree3827d61ee049cb0f2d5edc6951210d112b5378f7 /src/arch/x86/boot
parent0ec3f493a332a7e779600406732141573fafd526 (diff)
downloadcoreboot-deb2cb27e9bade18c4d186899edfaeabfc1131bd.tar.xz
Static CBMEM / CAR: Flag boards with BROKEN_CAR_MIGRATE
Use of CAR_GLOBAL is not safe after CAR is torn down, unless the board properly implements EARLY_CBMEM_INIT. Flag vulnerable boards that only do cbmem_recovery() in romstage on S3 resume and implementation with Intel FSP that invalidates cache before we have a chance to copy the contents. Change-Id: Iecd10dee9b73ab3f1f66826950fa0945675ff39f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5419 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/arch/x86/boot')
-rw-r--r--src/arch/x86/boot/Makefile.inc2
-rw-r--r--src/arch/x86/boot/cbmem.c4
2 files changed, 4 insertions, 2 deletions
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 79c64170b4..928fc03e68 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -1,5 +1,5 @@
romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c
-romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
+romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c
ramstage-y += boot.c
ramstage-y += gdt.c
diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c
index c2d9a2ed87..8b2b6da678 100644
--- a/src/arch/x86/boot/cbmem.c
+++ b/src/arch/x86/boot/cbmem.c
@@ -49,13 +49,15 @@ void set_top_of_ram(uint64_t ramtop)
backup_top_of_ram(ramtop);
cbmem_late_set_table(ramtop - HIGH_MEMORY_SIZE, HIGH_MEMORY_SIZE);
}
+#endif /* !__PRE_RAM__ */
+#if CONFIG_BROKEN_CAR_MIGRATE || !defined(__PRE_RAM__)
unsigned long __attribute__((weak)) get_top_of_ram(void)
{
printk(BIOS_WARNING, "WARNING: you need to define get_top_of_ram() for your chipset\n");
return 0;
}
-#endif /* !__PRE_RAM__ */
+#endif
#else