diff options
author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/arch/x86/bootblock_crt0.S | |
parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
download | coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/x86/bootblock_crt0.S')
-rw-r--r-- | src/arch/x86/bootblock_crt0.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 4eb36b2ce1..ea55096abd 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -32,7 +32,7 @@ #include <cpu/x86/16bit/reset16.inc> #include <cpu/x86/32bit/entry32.inc> -#if IS_ENABLED(CONFIG_BOOTBLOCK_DEBUG_SPINLOOP) +#if CONFIG(BOOTBLOCK_DEBUG_SPINLOOP) /* Wait for a JTAG debugger to break in and set EBX non-zero */ xor %ebx, %ebx @@ -44,7 +44,7 @@ debug_spinloop: bootblock_protected_mode_entry: -#if !IS_ENABLED(CONFIG_USE_MARCH_586) +#if !CONFIG(USE_MARCH_586) /* MMX registers required here */ /* BIST result in eax */ @@ -57,12 +57,12 @@ bootblock_protected_mode_entry: movd %edx, %mm2 #endif -#if IS_ENABLED(CONFIG_SSE) +#if CONFIG(SSE) enable_sse: mov %cr4, %eax or $CR4_OSFXSR, %ax mov %eax, %cr4 -#endif /* IS_ENABLED(CONFIG_SSE) */ +#endif /* CONFIG(SSE) */ /* We're done. Now it's up to platform-specific code */ jmp bootblock_pre_c_entry |