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authorRob Barnes <robbarnes@google.com>2020-09-01 10:26:57 -0600
committerAaron Durbin <adurbin@chromium.org>2020-09-03 21:27:54 +0000
commit327f1058d2feaa022407128aa9dac55f408b714c (patch)
tree4ba7bf5eb56a3840e75065b4fc344ec8153fa353 /src/arch/x86/c_start.S
parent923b175f7e9aeee4ec49eae9221e4d54a602692d (diff)
downloadcoreboot-327f1058d2feaa022407128aa9dac55f408b714c.tar.xz
memory_info: add max_speed_mts and configured_speed_mts
ddr_frequency is ambiguous and is interpreted differently in several places. Instead of renaming this field, this deprecates it and adds two new fields with unambiguous naming, max_speed_mts and configured_speed_mts. smbios.c falls back to using ddr_frequency when either of these fields are 0. The same value was being used for both configured memory speed and max memory speed in SMBIOS type 17, which is not accurate when configured speed is not the max speed. BUG=b:167218112 TEST=Boot ezkinil, no change to dmidecode -t17 Change-Id: Iaa75401f9fc33642dbdce6c69bd9b20f96d1cc25 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44549 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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