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authorStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-13 09:39:15 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-13 21:04:56 +0200
commit6cb3a59fd5e754c3627b79db21c5bcc284bfd721 (patch)
treee83db5b11ee4a29d496dcf2798d024b6b8455ab7 /src/arch/x86/cbmem.c
parent9693885ad88d21ead7bd9ebc32f3e4901841b18b (diff)
downloadcoreboot-6cb3a59fd5e754c3627b79db21c5bcc284bfd721.tar.xz
x86: flatten hierarchy
It never made sense to have bootblock_* in init, but pirq_routing.c in boot, and some ld scripts on the main level while others live in subdirectories. This patch flattens the directory hierarchy and makes x86 more similar to the other architectures. Change-Id: I4056038fe7813e4d3d3042c441e7ab6076a36384 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10901 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/cbmem.c')
-rw-r--r--src/arch/x86/cbmem.c76
1 files changed, 76 insertions, 0 deletions
diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c
new file mode 100644
index 0000000000..e279db960c
--- /dev/null
+++ b/src/arch/x86/cbmem.c
@@ -0,0 +1,76 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <stdlib.h>
+#include <console/console.h>
+#include <cbmem.h>
+#include <arch/acpi.h>
+
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+
+#if !defined(__PRE_RAM__)
+void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop)
+{
+ /* Do nothing. Chipset may have implementation to save ramtop in NVRAM. */
+}
+
+static void *ramtop_pointer;
+
+void set_top_of_ram(uint64_t ramtop)
+{
+ backup_top_of_ram(ramtop);
+ ramtop_pointer = (void *)(uintptr_t)ramtop;
+}
+
+static inline void *saved_ramtop(void)
+{
+ return ramtop_pointer;
+}
+#else
+static inline void *saved_ramtop(void)
+{
+ return NULL;
+}
+#endif /* !__PRE_RAM__ */
+
+unsigned long __attribute__((weak)) get_top_of_ram(void)
+{
+ return 0;
+}
+
+void *cbmem_top(void)
+{
+ /* Top of cbmem is at lowest usable DRAM address below 4GiB. */
+ void *ptr = saved_ramtop();
+
+ if (ptr != NULL)
+ return ptr;
+
+ return (void *)get_top_of_ram();
+}
+
+#endif /* LATE_CBMEM_INIT */
+
+/* Something went wrong, our high memory area got wiped */
+void cbmem_fail_resume(void)
+{
+#if !defined(__PRE_RAM__) && IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+ /* ACPI resume needs to be cleared in the fail-to-recover case, but that
+ * condition is only handled during ramstage. */
+ acpi_fail_wakeup();
+#endif
+}