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| author | Aaron Durbin <adurbin@chromium.org> | 2018-04-20 01:39:30 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-26 15:17:08 +0000 |
| commit | 4b032e457f1377fc06d12214b0450eae48653565 (patch) | |
| tree | dcf00137ed645aba00a2721b2d75bc46afcb7d8f /src/arch/x86/idt.S | |
| parent | e74ba1984dc545c7199c1e90b9ffaa33a44bee5e (diff) | |
| download | coreboot-4b032e457f1377fc06d12214b0450eae48653565.tar.xz | |
arch/x86: allow idt to be available to link in all stages
Add Kconfig IDT_IN_EVERY_STAGE to optionally specify having
the interrupt handling code available to all stages. In order
to do this the idt setup is moved to a C module. The vecX
entries are made global so that a table of references to all
the interrupt vector entry points can be used to dynamically
initialize the idt. The ramification for ramstage is that
exceptions are initialized later (lib/hardwaremain.c). Not
all stages initialize exceptions when this Kconfig variable
is selected, but bootblock for the C, stages using
assembly_entry.S, and of course ramstage do. Anything left
out just needs a call to exception_init() at the right
location.
BUG=b:72728953
Change-Id: I4146a040e5e43bed7ccc6cb0a7dc2271f1e7b7fa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/x86/idt.S')
| -rw-r--r-- | src/arch/x86/idt.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/x86/idt.S b/src/arch/x86/idt.S index 17ddb57fb7..e119c32b93 100644 --- a/src/arch/x86/idt.S +++ b/src/arch/x86/idt.S @@ -17,7 +17,8 @@ #else .code32 #endif -.global vec0 +.global vec0, vec1, vec2, vec3, vec4, vec5, vec6, vec7, vec8, vec9 +.global vec10, vec11, vec12, vec13, vec14, vec15, vec16, vec17, vec18, vec19 vec0: push $0 /* error code */ push $0 /* vector */ |