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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-16 13:41:11 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-17 03:17:39 +0100
commit024b13d07c6dcef7acefc3b69c16c46be431fb82 (patch)
treeb31fb158c61e7c5609a5f16c39624363aa2048d1 /src/arch/x86/include
parent9c7c6f7213decfc0d0fee4bbc911a291ee93bcdb (diff)
downloadcoreboot-024b13d07c6dcef7acefc3b69c16c46be431fb82.tar.xz
arch/x86: Fix space issues detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl: ERROR: space required before the open parenthesis '(' ERROR: space prohibited after that open parenthesis '(' ERROR: space prohibited before that close parenthesis ')' ERROR: space prohibited after that open square bracket '[' ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited before that ',' (ctx:WxW) ERROR: space required after that ';' (ctx:VxV) ERROR: spaces required around that ':' (ctx:ExV) ERROR: spaces required around that ':' (ctx:VxW) ERROR: spaces required around that ':' (ctx:WxV) ERROR: spaces required around that '=' (ctx:VxV) ERROR: spaces required around that '+=' (ctx:VxV) ERROR: spaces required around that '<=' (ctx:WxV) ERROR: spaces required around that '||' (ctx:VxW) ERROR: space prohibited before that '++' (ctx:WxO) ERROR: need consistent spacing around '+' (ctx:WxV) ERROR: spaces required around that '<' (ctx:WxV) ERROR: spaces required around that '<' (ctx:VxV) ERROR: need consistent spacing around '>>' (ctx:WxV) ERROR: "(foo*)" should be "(foo *)" ERROR: "foo* bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: code indent should use tabs where possible WARNING: space prohibited between function name and open parenthesis '(' WARNING: unnecessary whitespace before a quoted newline WARNING: please, no spaces at the start of a line WARNING: please, no space before tabs WARNING: Unnecessary space before function pointer arguments TEST=Build and run on Galileo Gen2 Change-Id: I2d7e1a329c6b2e8ca9633a97b595566544d7fd33 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18862 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/acpi.h17
-rw-r--r--src/arch/x86/include/arch/acpi_device.h2
-rw-r--r--src/arch/x86/include/arch/acpigen.h4
-rw-r--r--src/arch/x86/include/arch/bootblock_romcc.h2
-rw-r--r--src/arch/x86/include/arch/cbfs.h4
-rw-r--r--src/arch/x86/include/arch/cpu.h2
-rw-r--r--src/arch/x86/include/arch/early_variables.h8
-rw-r--r--src/arch/x86/include/arch/io.h12
-rw-r--r--src/arch/x86/include/arch/smp/atomic.h10
-rw-r--r--src/arch/x86/include/arch/smp/spinlock.h24
10 files changed, 43 insertions, 42 deletions
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index a767a45898..41c4fa75c8 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -502,7 +502,7 @@ enum acpi_preferred_pm_profiles {
PM_MOBILE = 2,
PM_WORKSTATION = 3,
PM_ENTERPRISE_SERVER = 4,
- PM_SOHO_SERVER = 5,
+ PM_SOHO_SERVER = 5,
PM_APPLIANCE_PC = 6,
PM_PERFORMANCE_SERVER = 7,
PM_TABLET = 8, /* ACPI 5.0 */
@@ -589,11 +589,11 @@ unsigned long fw_cfg_acpi_tables(unsigned long start);
unsigned long write_acpi_tables(unsigned long addr);
unsigned long acpi_fill_madt(unsigned long current);
unsigned long acpi_fill_mcfg(unsigned long current);
-unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current);
+unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current);
void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id);
-void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs, void *dsdt);
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt);
#if IS_ENABLED(CONFIG_COMMON_FADT)
-void acpi_fill_fadt(acpi_fadt_t * fadt);
+void acpi_fill_fadt(acpi_fadt_t *fadt);
#endif
void update_ssdt(void *ssdt);
@@ -617,7 +617,7 @@ unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags,
u8 lint);
int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
-int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek,u32 sizek,
+int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
u32 flags);
int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base,
u16 seg_nr, u8 start, u8 end);
@@ -631,10 +631,11 @@ void acpi_create_slit(acpi_slit_t *slit,
void acpi_create_vfct(struct device *device,
struct acpi_vfct *vfct,
unsigned long (*acpi_fill_vfct)(struct device *device,
- struct acpi_vfct *vfct_struct, unsigned long current));
+ struct acpi_vfct *vfct_struct,
+ unsigned long current));
void acpi_create_ivrs(acpi_ivrs_t *ivrs,
- unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t* ivrs_struct, unsigned long current));
+ unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long current));
#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
void acpi_create_hpet(acpi_hpet_t *hpet);
@@ -649,7 +650,7 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg);
void acpi_create_facs(acpi_facs_t *facs);
void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
- unsigned long (*acpi_fill_dmar) (unsigned long));
+ unsigned long (*acpi_fill_dmar)(unsigned long));
unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
u16 segment, u32 bar);
unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h
index 084e8afe5e..29e0e8dd7a 100644
--- a/src/arch/x86/include/arch/acpi_device.h
+++ b/src/arch/x86/include/arch/acpi_device.h
@@ -136,7 +136,7 @@ enum acpi_gpio_polarity {
};
#define ACPI_GPIO_REVISION_ID 1
-#define ACPI_GPIO_MAX_PINS 8
+#define ACPI_GPIO_MAX_PINS 8
struct acpi_gpio {
int pin_count;
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index c1c4d598c4..c70e4b9653 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -205,11 +205,11 @@ void acpigen_write_STA(uint8_t status);
void acpigen_write_TPC(const char *gnvs_tpc_limit);
void acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat,
u32 control, u32 status);
-typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
+typedef enum { SW_ALL = 0xfc, SW_ANY = 0xfd, HW_ALL = 0xfe } PSD_coord;
void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
void acpigen_write_CST_package_entry(acpi_cstate_t *cstate);
void acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
-typedef enum { CSD_HW_ALL=0xfe } CSD_coord;
+typedef enum { CSD_HW_ALL = 0xfe } CSD_coord;
void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype, u32 index);
void acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
void acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list);
diff --git a/src/arch/x86/include/arch/bootblock_romcc.h b/src/arch/x86/include/arch/bootblock_romcc.h
index 4378d39d0d..2e96d2a55f 100644
--- a/src/arch/x86/include/arch/bootblock_romcc.h
+++ b/src/arch/x86/include/arch/bootblock_romcc.h
@@ -50,7 +50,7 @@ static void bootblock_mainboard_init(void)
static void sanitize_cmos(void)
{
if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
- unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default");
+ unsigned char *cmos_default = (unsigned char *)walkcbfs("cmos.default");
if (cmos_default) {
int i;
cmos_disable_rtc();
diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h
index 01a7b32589..81100a5476 100644
--- a/src/arch/x86/include/arch/cbfs.h
+++ b/src/arch/x86/include/arch/cbfs.h
@@ -19,7 +19,7 @@
#include <commonlib/cbfs_serialized.h>
#include <endian.h>
-#define CBFS_SUBHEADER(_p) ( (void *) ((((uint8_t *) (_p)) + ntohl((_p)->offset))) )
+#define CBFS_SUBHEADER(_p) ((void *)((((uint8_t *)(_p)) + ntohl((_p)->offset))))
static struct cbfs_file *walkcbfs_head(char *target)
{
@@ -47,7 +47,7 @@ struct cbfs_stage_restricted {
unsigned long entry; // this is really 64bit, but properly endianized
};
-static inline unsigned long findstage(char* target)
+static inline unsigned long findstage(char *target)
{
struct cbfs_stage_restricted *stage = walkcbfs(target);
if ((u32)stage != 0)
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 9c94ab1e8e..936dcf403c 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -204,7 +204,7 @@ static inline struct cpu_info *cpu_info(void)
"andl %%esp,%0; "
"orl %2, %0 "
#endif
- :"=r" (ci)
+ : "=r" (ci)
: "0" (~(CONFIG_STACK_SIZE - 1)),
"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
);
diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h
index e78b846f8e..b48848e4a3 100644
--- a/src/arch/x86/include/arch/early_variables.h
+++ b/src/arch/x86/include/arch/early_variables.h
@@ -24,9 +24,9 @@
asm(".section .car.global_data,\"w\",@nobits");
asm(".previous");
#ifdef __clang__
-#define CAR_GLOBAL __attribute__((used,section(".car.global_data")))
+#define CAR_GLOBAL __attribute__((used, section(".car.global_data")))
#else
-#define CAR_GLOBAL __attribute__((used,section(".car.global_data#")))
+#define CAR_GLOBAL __attribute__((used, section(".car.global_data#")))
#endif /* __clang__ */
/*
@@ -56,9 +56,9 @@ void *car_sync_var_ptr(void *var);
#define car_get_var(var) \
*(typeof(var) *)car_get_var_ptr(&(var))
#define car_sync_var(var) \
- *(typeof (var) *)car_sync_var_ptr(&(var))
+ *(typeof(var) *)car_sync_var_ptr(&(var))
#define car_set_var(var, val) \
- do { car_get_var(var) = (val); } while(0)
+ do { car_get_var(var) = (val); } while (0)
static inline size_t car_data_size(void)
{
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 63359f1464..0edddb08ef 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -303,7 +303,7 @@ void pci_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
#define PCI_DEV_INVALID (0xffffffffU)
static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
{
- for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+ for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
unsigned int id;
id = pci_io_read_config32(dev, 0);
if (id == pci_id)
@@ -314,7 +314,7 @@ static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev)
{
- for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+ for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
unsigned int id;
id = pci_read_config32(dev, 0);
if (id == pci_id)
@@ -330,7 +330,7 @@ static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus
dev = PCI_DEV(bus, 0, 0);
last = PCI_DEV(bus, 31, 7);
- for (; dev <=last; dev += PCI_DEV(0,0,1)) {
+ for (; dev <= last; dev += PCI_DEV(0, 0, 1)) {
unsigned int id;
id = pci_read_config32(dev, 0);
if (id == pci_id)
@@ -343,15 +343,15 @@ static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus
static inline __attribute__((always_inline)) void pnp_write_config(pnp_devfn_t dev, uint8_t reg, uint8_t value)
{
unsigned port = dev >> 8;
- outb(reg, port );
- outb(value, port +1);
+ outb(reg, port);
+ outb(value, port + 1);
}
static inline __attribute__((always_inline)) uint8_t pnp_read_config(pnp_devfn_t dev, uint8_t reg)
{
unsigned port = dev >> 8;
outb(reg, port);
- return inb(port +1);
+ return inb(port + 1);
}
static inline __attribute__((always_inline))
diff --git a/src/arch/x86/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h
index a3ff16a9d9..258c329b43 100644
--- a/src/arch/x86/include/arch/smp/atomic.h
+++ b/src/arch/x86/include/arch/smp/atomic.h
@@ -46,7 +46,7 @@ typedef struct { volatile int counter; } atomic_t;
* Atomically sets the value of v to i. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-#define atomic_set(v,i) (((v)->counter) = (i))
+#define atomic_set(v, i) (((v)->counter) = (i))
/**
* atomic_inc - increment atomic variable
@@ -59,8 +59,8 @@ static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
{
__asm__ __volatile__(
"lock ; incl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ : "=m" (v->counter)
+ : "m" (v->counter));
}
/**
@@ -74,8 +74,8 @@ static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v)
{
__asm__ __volatile__(
"lock ; decl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ : "=m" (v->counter)
+ : "m" (v->counter));
}
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 767f96e259..716de15d15 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -30,9 +30,9 @@ typedef struct {
#ifdef __PRE_RAM__
spinlock_t *romstage_console_lock(void);
void initialize_romstage_console_lock(void);
-spinlock_t* romstage_nvram_cbfs_lock(void);
+spinlock_t *romstage_nvram_cbfs_lock(void);
void initialize_romstage_nvram_cbfs_lock(void);
-spinlock_t* romstage_microcode_cbfs_lock(void);
+spinlock_t *romstage_microcode_cbfs_lock(void);
void initialize_romstage_microcode_cbfs_lock(void);
#endif
@@ -50,9 +50,9 @@ void initialize_romstage_microcode_cbfs_lock(void);
*
* We make no fairness assumptions. They have a cost.
*/
-#define barrier() __asm__ __volatile__("": : :"memory")
+#define barrier() __asm__ __volatile__("" : : : "memory")
#define spin_is_locked(x) (*(volatile char *)(&(x)->lock) <= 0)
-#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
+#define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x))
#define spin_lock_string \
"\n1:\t" \
@@ -76,31 +76,31 @@ static inline __attribute__((always_inline)) void spin_lock(spinlock_t *lock)
{
__asm__ __volatile__(
spin_lock_string
- :"=m" (lock->lock) : : "memory");
+ : "=m" (lock->lock) : : "memory");
}
static inline __attribute__((always_inline)) void spin_unlock(spinlock_t *lock)
{
__asm__ __volatile__(
spin_unlock_string
- :"=m" (lock->lock) : : "memory");
+ : "=m" (lock->lock) : : "memory");
}
/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
static inline __attribute__((always_inline)) void cpu_relax(void)
{
- __asm__ __volatile__("rep;nop": : :"memory");
+ __asm__ __volatile__("rep;nop" : : : "memory");
}
#else /* !__PRE_RAM__ */
#define DECLARE_SPIN_LOCK(x)
-#define barrier() do {} while(0)
+#define barrier() do {} while (0)
#define spin_is_locked(lock) 0
-#define spin_unlock_wait(lock) do {} while(0)
-#define spin_lock(lock) do {} while(0)
-#define spin_unlock(lock) do {} while(0)
-#define cpu_relax() do {} while(0)
+#define spin_unlock_wait(lock) do {} while (0)
+#define spin_lock(lock) do {} while (0)
+#define spin_unlock(lock) do {} while (0)
+#define cpu_relax() do {} while (0)
#endif /* !__PRE_RAM__ */