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authorDuncan Laurie <dlaurie@chromium.org>2017-03-15 11:14:57 -0700
committerDuncan Laurie <dlaurie@chromium.org>2017-03-16 16:24:46 +0100
commit346cfe363ee79da6a59611b8b24f5ad01053ea01 (patch)
tree9d195e376d240375cc732d931406b6236109d94e /src/arch/x86/include
parent9462e140653048856947b31612590a8b98222787 (diff)
downloadcoreboot-346cfe363ee79da6a59611b8b24f5ad01053ea01.tar.xz
acpi_device: Add macro for GpioInt that uses both polarity
GPIO edge interrupts can report that they are ActiveBoth and will generate an interrupt event on both rising and falling edges. Add a macro so this type of GPIO interrupt can be used. BUG=b:35581264 BRANCH=none TEST=successfully use this interrupt type on Eve Change-Id: I91408386538e442bddcacc9840e0aa14370a446c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/18834 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/acpi_device.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h
index 6933f315ba..084e8afe5e 100644
--- a/src/arch/x86/include/arch/acpi_device.h
+++ b/src/arch/x86/include/arch/acpi_device.h
@@ -200,6 +200,15 @@ struct acpi_gpio {
.pin_count = 1, \
.pins = { (gpio) } }
+/* Edge Triggered Active Both GPIO interrupt */
+#define ACPI_GPIO_IRQ_EDGE_BOTH(gpio) { \
+ .type = ACPI_GPIO_TYPE_INTERRUPT, \
+ .pull = ACPI_GPIO_PULL_DEFAULT, \
+ .irq.mode = ACPI_IRQ_EDGE_TRIGGERED, \
+ .irq.polarity = ACPI_IRQ_ACTIVE_BOTH, \
+ .pin_count = 1, \
+ .pins = { (gpio) } }
+
/* Level Triggered Active High GPIO interrupt */
#define ACPI_GPIO_IRQ_LEVEL_HIGH(gpio) { \
.type = ACPI_GPIO_TYPE_INTERRUPT, \