diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2017-02-17 17:07:23 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-02-19 21:34:47 +0100 |
| commit | 4f31d5c2ced908a1d18b14670149c8f2e12fe804 (patch) | |
| tree | bdc77bf5cb69a9dc4c34d7921e7d1ef7be4604fe /src/arch/x86/include | |
| parent | bd73dbbc38649bd487a44b0bb49fdaa19a248634 (diff) | |
| download | coreboot-4f31d5c2ced908a1d18b14670149c8f2e12fe804.tar.xz | |
acpi_device: Add macros for GPIO interrupts
Add individual macros for the various interrupt types so
they can be used in devicetree.
BUG=chrome-os-partner:58666
TEST=nothing uses this yet, will be used in an upcoming commit
Change-Id: I2a569f60fcc0815835615656b09670987036b848
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18392
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/x86/include')
| -rw-r--r-- | src/arch/x86/include/arch/acpi_device.h | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 7d4cb8fd89..d88d519298 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -175,12 +175,39 @@ struct acpi_gpio { .pin_count = 1, \ .pins = { (gpio) } } -/* Basic interrupt GPIO with default pull settings */ -#define ACPI_GPIO_INTERRUPT(gpio,mode,polarity) { \ +/* Edge Triggered Active High GPIO interrupt */ +#define ACPI_GPIO_IRQ_EDGE_HIGH(gpio) { \ .type = ACPI_GPIO_TYPE_INTERRUPT, \ .pull = ACPI_GPIO_PULL_DEFAULT, \ - .irq.mode = (mode), \ - .irq.polarity = (polarity), \ + .irq.mode = IRQ_EDGE_TRIGGERED, \ + .irq.polarity = IRQ_ACTIVE_HIGH, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Edge Triggered Active Low GPIO interrupt */ +#define ACPI_GPIO_IRQ_EDGE_LOW(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = IRQ_EDGE_TRIGGERED, \ + .irq.polarity = IRQ_ACTIVE_LOW, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Level Triggered Active High GPIO interrupt */ +#define ACPI_GPIO_IRQ_LEVEL_HIGH(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = IRQ_ACTIVE_HIGH, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Level Triggered Active Low GPIO interrupt */ +#define ACPI_GPIO_IRQ_LEVEL_LOW(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = IRQ_ACTIVE_LOW, \ .pin_count = 1, \ .pins = { (gpio) } } |