summaryrefslogtreecommitdiff
path: root/src/arch/x86/include
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-23 15:59:38 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-11 20:40:42 +0000
commit8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8 (patch)
treeba5d8ea7348280fdb14d752cec115abcfe2826ec /src/arch/x86/include
parent06e33226b3cfd2c642f769440b7d1b5191c99d6b (diff)
downloadcoreboot-8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8.tar.xz
device/pci_ops: Move common pci_mmio_cfg.h
It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic. Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/io.h2
-rw-r--r--src/arch/x86/include/arch/pci_mmio_cfg.h71
2 files changed, 1 insertions, 72 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 4b4a178110..a2ba776f81 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr,
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h>
-#include <arch/pci_mmio_cfg.h>
+#include <device/pci_mmio_cfg.h>
static __always_inline
uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
deleted file mode 100644
index c660ed5332..0000000000
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _PCI_MMIO_CFG_H
-#define _PCI_MMIO_CFG_H
-
-#include <arch/io.h>
-
-#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
-
-static __always_inline
-u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
- return read8(addr);
-}
-
-static __always_inline
-u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
- return read16(addr);
-}
-
-static __always_inline
-u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
- return read32(addr);
-}
-
-static __always_inline
-void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
- write8(addr, value);
-}
-
-static __always_inline
-void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
- write16(addr, value);
-}
-
-static __always_inline
-void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
-{
- void *addr;
- addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
- write32(addr, value);
-}
-
-#endif /* _PCI_MMIO_CFG_H */