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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-27 23:12:08 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-30 23:07:44 +0200
commitf69b46805c875c81af850af5567a18a934ce28bc (patch)
treef5387e49e9a47abf5018a31d0e1796323235205c /src/arch/x86/include
parent6ea86b19f34ec2a54b355e10a8f4e6e84ffa74ce (diff)
downloadcoreboot-f69b46805c875c81af850af5567a18a934ce28bc.tar.xz
acpigen: make acpigen_write_CST_package_entry non-static
It's used by Sandybridge specific C state generation code. Change-Id: Ia6f1e14e748841a9646fd93d0a18f9e8f2a55e29 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/949 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/acpigen.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index ae8aaf73c9..aebf508b5e 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -49,6 +49,7 @@ int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat
u32 control, u32 status);
typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
+int acpigen_write_CST_package_entry(acpi_cstate_t *cstate);
int acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
int acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list);