diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-02-28 22:37:15 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-03-05 20:11:35 +0100 |
| commit | 73f7069fe6915cce545d4a5839ab1760e1fed2a2 (patch) | |
| tree | 164a29ca233f89e253aca08ee4b9407eaa17d684 /src/arch/x86/include | |
| parent | dd56de974ddc7d0d8d782b50d9260b0596f59a1a (diff) | |
| download | coreboot-73f7069fe6915cce545d4a5839ab1760e1fed2a2.tar.xz | |
arch/x86: Add common assembly code for stages that run in CAR
This adds a few assembly lines that are generic enough to be shared
between romstage and verstage that are ran in CAR. The GDT reload
is bypassed and the stack is reloaded with the CAR stack defined
in car.ld. The entry point for all those stages is car_stage_entry().
Change-Id: Ie7ef6a02f62627f29a109126d08c68176075bd67
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13861
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/x86/include')
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 408fa15180..f50901fe73 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -239,4 +239,13 @@ static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms) #define asmlinkage __attribute__((regparm(0))) #define alwaysinline inline __attribute__((always_inline)) +#ifndef __ROMCC__ +/* + * When using CONFIG_C_ENVIRONMENT_BOOTBLOCK the car_stage_entry() + * is the symbol jumped to for each stage after bootblock using + * cache-as-ram. + */ +void asmlinkage car_stage_entry(void); +#endif + #endif /* ARCH_CPU_H */ |