diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-13 09:39:15 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-13 21:04:56 +0200 |
commit | 6cb3a59fd5e754c3627b79db21c5bcc284bfd721 (patch) | |
tree | e83db5b11ee4a29d496dcf2798d024b6b8455ab7 /src/arch/x86/lib | |
parent | 9693885ad88d21ead7bd9ebc32f3e4901841b18b (diff) | |
download | coreboot-6cb3a59fd5e754c3627b79db21c5bcc284bfd721.tar.xz |
x86: flatten hierarchy
It never made sense to have bootblock_* in init, but
pirq_routing.c in boot, and some ld scripts on the main
level while others live in subdirectories.
This patch flattens the directory hierarchy and makes
x86 more similar to the other architectures.
Change-Id: I4056038fe7813e4d3d3042c441e7ab6076a36384
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10901
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/lib')
-rw-r--r-- | src/arch/x86/lib/Makefile.inc | 48 | ||||
-rw-r--r-- | src/arch/x86/lib/c_start.S | 421 | ||||
-rw-r--r-- | src/arch/x86/lib/cbfs_and_run.c | 26 | ||||
-rw-r--r-- | src/arch/x86/lib/cpu.c | 273 | ||||
-rw-r--r-- | src/arch/x86/lib/cpu_common.c | 65 | ||||
-rw-r--r-- | src/arch/x86/lib/ebda.c | 52 | ||||
-rw-r--r-- | src/arch/x86/lib/exception.c | 511 | ||||
-rw-r--r-- | src/arch/x86/lib/id.inc | 18 | ||||
-rw-r--r-- | src/arch/x86/lib/id.ld | 6 | ||||
-rw-r--r-- | src/arch/x86/lib/ioapic.c | 153 | ||||
-rw-r--r-- | src/arch/x86/lib/memcpy.c | 22 | ||||
-rw-r--r-- | src/arch/x86/lib/memmove.c | 187 | ||||
-rw-r--r-- | src/arch/x86/lib/memset.c | 84 | ||||
-rw-r--r-- | src/arch/x86/lib/mmap_boot.c | 75 | ||||
-rw-r--r-- | src/arch/x86/lib/pci_ops_conf1.c | 71 | ||||
-rw-r--r-- | src/arch/x86/lib/pci_ops_mmconf.c | 61 | ||||
-rw-r--r-- | src/arch/x86/lib/romcc_console.c | 87 | ||||
-rw-r--r-- | src/arch/x86/lib/stages.c | 25 | ||||
-rw-r--r-- | src/arch/x86/lib/thread.c | 65 | ||||
-rw-r--r-- | src/arch/x86/lib/thread_switch.S | 58 | ||||
-rw-r--r-- | src/arch/x86/lib/timestamp.c | 26 | ||||
-rw-r--r-- | src/arch/x86/lib/walkcbfs.S | 117 |
22 files changed, 0 insertions, 2451 deletions
diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc deleted file mode 100644 index ccfe30ae67..0000000000 --- a/src/arch/x86/lib/Makefile.inc +++ /dev/null @@ -1,48 +0,0 @@ - -ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y) - -romstage-y += cbfs_and_run.c -romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c -romstage-y += memset.c -romstage-y += memcpy.c -romstage-y += memmove.c -romstage-y += mmap_boot.c - -endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64 - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) - -ramstage-y += c_start.S -ramstage-y += cpu.c -ramstage-y += cpu_common.c -ramstage-y += pci_ops_conf1.c -ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c -ramstage-y += exception.c -ramstage-$(CONFIG_IOAPIC) += ioapic.c -ramstage-y += memset.c -ramstage-y += memcpy.c -ramstage-y += memmove.c -ramstage-y += ebda.c -ramstage-y += mmap_boot.c -ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c -ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S -ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c - -romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c - -smm-y += memset.c -smm-y += memcpy.c -smm-y += memmove.c -smm-y += mmap_boot.c - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) -rmodules_x86_32-y += memset.c -rmodules_x86_32-y += memcpy.c -rmodules_x86_32-y += memmove.c -else -rmodules_x86_64-y += memset.c -rmodules_x86_64-y += memcpy.c -rmodules_x86_64-y += memmove.c -endif - -endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64 diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S deleted file mode 100644 index 582966bfdc..0000000000 --- a/src/arch/x86/lib/c_start.S +++ /dev/null @@ -1,421 +0,0 @@ -#include <cpu/x86/post_code.h> - -/* Place the stack in the bss section. It's not necessary to define it in the - * the linker script. */ - .section .bss, "aw", @nobits -.global _stack -.global _estack - -.align CONFIG_STACK_SIZE -_stack: -.space CONFIG_MAX_CPUS*CONFIG_STACK_SIZE -_estack: -#if CONFIG_COOP_MULTITASKING -.global thread_stacks -thread_stacks: -.space CONFIG_STACK_SIZE*CONFIG_NUM_THREADS -#endif - - .section ".text._start", "ax", @progbits -#ifdef __x86_64__ - .code64 -#else - .code32 -#endif - .globl _start - .globl __rmodule_entry -__rmodule_entry: -_start: - cli - lgdt %cs:gdtaddr -#ifndef __x86_64__ - ljmp $0x10, $1f -#endif -1: movl $0x18, %eax - movl %eax, %ds - movl %eax, %es - movl %eax, %ss - movl %eax, %fs - movl %eax, %gs -#ifdef __x86_64__ - mov $0x48, %ecx - call SetCodeSelector -#endif - - post_code(POST_ENTRY_C_START) /* post 13 */ - - cld - - /** poison the stack. Code should not count on the - * stack being full of zeros. This stack poisoning - * recently uncovered a bug in the broadcast SIPI - * code. - */ - leal _stack, %edi - movl $_estack, %ecx - subl %edi, %ecx - shrl $2, %ecx /* it is 32 bit aligned, right? */ - movl $0xDEADBEEF, %eax - rep - stosl - - /* set new stack */ - movl $_estack, %esp - -#if CONFIG_COOP_MULTITASKING - /* Push the thread pointer. */ - push $0 -#endif - /* Push the cpu index and struct cpu */ - push $0 - push $0 - - /* Initialize the Interrupt Descriptor table */ - leal _idt, %edi - leal vec0, %ebx - movl $(0x10 << 16), %eax /* cs selector */ - -1: movw %bx, %ax - movl %ebx, %edx - movw $0x8E00, %dx /* Interrupt gate - dpl=0, present */ - movl %eax, 0(%edi) - movl %edx, 4(%edi) - addl $6, %ebx - addl $8, %edi - cmpl $_idt_end, %edi - jne 1b - - /* Load the Interrupt descriptor table */ -#ifndef __x86_64__ - lidt idtarg -#else - // FIXME port table to x64 - lidt idtarg -#endif - - /* - * Now we are finished. Memory is up, data is copied and - * bss is cleared. Now we call the main routine and - * let it do the rest. - */ - post_code(POST_PRE_HARDWAREMAIN) /* post fe */ - -#if CONFIG_GDB_WAIT - call gdb_hw_init - call gdb_stub_breakpoint -#endif - call main - /* NOTREACHED */ -.Lhlt: - post_code(POST_DEAD_CODE) /* post ee */ - hlt - jmp .Lhlt - -vec0: - push $0 /* error code */ - push $0 /* vector */ - jmp int_hand -vec1: - push $0 /* error code */ - push $1 /* vector */ - jmp int_hand - -vec2: - push $0 /* error code */ - push $2 /* vector */ - jmp int_hand - -vec3: - push $0 /* error code */ - push $3 /* vector */ - jmp int_hand - -vec4: - push $0 /* error code */ - push $4 /* vector */ - jmp int_hand - -vec5: - push $0 /* error code */ - push $5 /* vector */ - jmp int_hand - -vec6: - push $0 /* error code */ - push $6 /* vector */ - jmp int_hand - -vec7: - push $0 /* error code */ - push $7 /* vector */ - jmp int_hand - -vec8: - /* error code */ - push $8 /* vector */ - jmp int_hand - .word 0x9090 - -vec9: - push $0 /* error code */ - push $9 /* vector */ - jmp int_hand - -vec10: - /* error code */ - push $10 /* vector */ - jmp int_hand - .word 0x9090 - -vec11: - /* error code */ - push $11 /* vector */ - jmp int_hand - .word 0x9090 - -vec12: - /* error code */ - push $12 /* vector */ - jmp int_hand - .word 0x9090 - -vec13: - /* error code */ - push $13 /* vector */ - jmp int_hand - .word 0x9090 - -vec14: - /* error code */ - push $14 /* vector */ - jmp int_hand - .word 0x9090 - -vec15: - push $0 /* error code */ - push $15 /* vector */ - jmp int_hand - -vec16: - push $0 /* error code */ - push $16 /* vector */ - jmp int_hand - -vec17: - /* error code */ - push $17 /* vector */ - jmp int_hand - .word 0x9090 - -vec18: - push $0 /* error code */ - push $18 /* vector */ - jmp int_hand - -vec19: - push $0 /* error code */ - push $19 /* vector */ - jmp int_hand - -int_hand: - /* At this point, on x86-32, on the stack there is: - * 0(%esp) vector - * 4(%esp) error code - * 8(%esp) eip - * 12(%esp) cs - * 16(%esp) eflags - */ -#ifdef __x86_64__ - push %rdi - push %rsi - push %rbp - /* Original stack pointer */ - lea 32(%rsp), %rbp - push %rbp - push %rbx - push %rdx - push %rcx - push %rax - - push %rsp /* Pointer to structure on the stack */ - call x86_exception - pop %rax /* Drop the pointer */ - - pop %rax - pop %rcx - pop %rdx - pop %rbx - pop %rbp /* Ignore saved %rsp value */ - pop %rbp - pop %rsi - pop %rdi - - add $8, %rsp /* pop of the vector and error code */ -#else - pushl %edi - pushl %esi - pushl %ebp - - /* Original stack pointer */ - leal 32(%esp), %ebp - pushl %ebp - pushl %ebx - pushl %edx - pushl %ecx - pushl %eax - - pushl %esp /* Pointer to structure on the stack */ - call x86_exception - pop %eax /* Drop the pointer */ - - popl %eax - popl %ecx - popl %edx - popl %ebx - popl %ebp /* Ignore saved %esp value */ - popl %ebp - popl %esi - popl %edi - - addl $8, %esp /* pop of the vector and error code */ -#endif - - iret - -#if CONFIG_GDB_WAIT - - .globl gdb_stub_breakpoint -gdb_stub_breakpoint: -#ifdef __x86_64__ - pop %rax /* Return address */ - pushfl - push %cs - push %rax /* Return address */ - push $0 /* No error code */ - push $32 /* vector 32 is user defined */ -#else - popl %eax /* Return address */ - pushfl - pushl %cs - pushl %eax /* Return address */ - pushl $0 /* No error code */ - pushl $32 /* vector 32 is user defined */ -#endif - jmp int_hand -#endif - - .globl gdt, gdt_end, idtarg - -gdtaddr: - .word gdt_end - gdt - 1 -#ifdef __x86_64__ - .quad gdt -#else - .long gdt /* we know the offset */ -#endif - - .data - - /* This is the gdt for GCC part of coreboot. - * It is different from the gdt in ROMCC/ASM part of coreboot - * which is defined in entry32.inc - * - * When the machine is initially started, we use a very simple - * gdt from rom (that in entry32.inc) which only contains those - * entries we need for protected mode. - * - * When we're executing code from RAM, we want to do more complex - * stuff, like initializing PCI option roms in real mode, or doing - * a resume from a suspend to ram. - */ -gdt: - /* selgdt 0, unused */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x00, 0x00, 0x00 - - /* selgdt 8, unused */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x00, 0x00, 0x00 - - /* selgdt 0x10, flat code segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ - - /* selgdt 0x18, flat data segment */ - .word 0xffff, 0x0000 -#ifdef __x86_64__ - .byte 0x00, 0x92, 0xcf, 0x00 -#else - .byte 0x00, 0x93, 0xcf, 0x00 -#endif - - /* selgdt 0x20, unused */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x00, 0x00, 0x00 - - /* The next two entries are used for executing VGA option ROMs */ - - /* selgdt 0x28 16 bit 64k code at 0x00000000 */ - .word 0xffff, 0x0000 - .byte 0, 0x9a, 0, 0 - - /* selgdt 0x30 16 bit 64k data at 0x00000000 */ - .word 0xffff, 0x0000 - .byte 0, 0x92, 0, 0 - - /* The next two entries are used for ACPI S3 RESUME */ - - /* selgdt 0x38, flat data segment 16 bit */ - .word 0x0000, 0x0000 /* dummy */ - .byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ - - /* selgdt 0x40, flat code segment 16 bit */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ - -#ifdef __x86_64__ - /* selgdt 0x48, flat x64 code segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xaf, 0x00 -#endif -gdt_end: - -idtarg: - .word _idt_end - _idt - 1 /* limit */ - .long _idt - .word 0 -_idt: - .fill 20, 8, 0 # idt is uninitialized -_idt_end: - -#ifdef __x86_64__ -SetCodeSelector: -.intel_syntax noprefix - - # save rsp because iret will align it to a 16 byte boundary - mov rdx, rsp - - # use iret to jump to a 64-bit offset in a new code segment - # iret will pop cs:rip, flags, then ss:rsp - mov ax, ss # need to push ss.. - push rax # push ss instuction not valid in x64 mode, so use ax - push rsp - pushfq - push rcx # cx is code segment selector from caller - mov rax, offset setCodeSelectorLongJump - push rax - - # the iret will continue at next instruction, with the new cs value loaded - iretq - -setCodeSelectorLongJump: - # restore rsp, it might not have been 16-byte aligned on entry - mov rsp, rdx - ret -.att_syntax prefix - - .previous -.code64 -#else - .previous -.code32 -#endif diff --git a/src/arch/x86/lib/cbfs_and_run.c b/src/arch/x86/lib/cbfs_and_run.c deleted file mode 100644 index b6d342623d..0000000000 --- a/src/arch/x86/lib/cbfs_and_run.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <arch/stages.h> -#include <program_loading.h> - -void asmlinkage copy_and_run(void) -{ - run_ramstage(); -} diff --git a/src/arch/x86/lib/cpu.c b/src/arch/x86/lib/cpu.c deleted file mode 100644 index 3eb7b9439e..0000000000 --- a/src/arch/x86/lib/cpu.c +++ /dev/null @@ -1,273 +0,0 @@ -#include <console/console.h> -#include <cpu/cpu.h> -#include <arch/io.h> -#include <string.h> -#include <cpu/x86/mtrr.h> -#include <cpu/x86/msr.h> -#include <cpu/x86/lapic.h> -#include <arch/cpu.h> -#include <device/path.h> -#include <device/device.h> -#include <smp/spinlock.h> - -#ifndef __x86_64__ -/* Standard macro to see if a specific flag is changeable */ -static inline int flag_is_changeable_p(uint32_t flag) -{ - uint32_t f1, f2; - - asm( - "pushfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "movl %0,%1\n\t" - "xorl %2,%0\n\t" - "pushl %0\n\t" - "popfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "popfl\n\t" - : "=&r" (f1), "=&r" (f2) - : "ir" (flag)); - return ((f1^f2) & flag) != 0; -} - -/* - * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected - * by the fact that they preserve the flags across the division of 5/2. - * PII and PPro exhibit this behavior too, but they have cpuid available. - */ - -/* - * Perform the Cyrix 5/2 test. A Cyrix won't change - * the flags, while other 486 chips will. - */ -static inline int test_cyrix_52div(void) -{ - unsigned int test; - - __asm__ __volatile__( - "sahf\n\t" /* clear flags (%eax = 0x0005) */ - "div %b2\n\t" /* divide 5 by 2 */ - "lahf" /* store flags into %ah */ - : "=a" (test) - : "0" (5), "q" (2) - : "cc"); - - /* AH is 0x02 on Cyrix after the divide.. */ - return (unsigned char) (test >> 8) == 0x02; -} - -/* - * Detect a NexGen CPU running without BIOS hypercode new enough - * to have CPUID. (Thanks to Herbert Oppmann) - */ - -static int deep_magic_nexgen_probe(void) -{ - int ret; - - __asm__ __volatile__ ( - " movw $0x5555, %%ax\n" - " xorw %%dx,%%dx\n" - " movw $2, %%cx\n" - " divw %%cx\n" - " movl $0, %%eax\n" - " jnz 1f\n" - " movl $1, %%eax\n" - "1:\n" - : "=a" (ret) : : "cx", "dx" ); - return ret; -} -#endif - -/* List of cpu vendor strings along with their normalized - * id values. - */ -static struct { - int vendor; - const char *name; -} x86_vendors[] = { - { X86_VENDOR_INTEL, "GenuineIntel", }, - { X86_VENDOR_CYRIX, "CyrixInstead", }, - { X86_VENDOR_AMD, "AuthenticAMD", }, - { X86_VENDOR_UMC, "UMC UMC UMC ", }, - { X86_VENDOR_NEXGEN, "NexGenDriven", }, - { X86_VENDOR_CENTAUR, "CentaurHauls", }, - { X86_VENDOR_RISE, "RiseRiseRise", }, - { X86_VENDOR_TRANSMETA, "GenuineTMx86", }, - { X86_VENDOR_TRANSMETA, "TransmetaCPU", }, - { X86_VENDOR_NSC, "Geode by NSC", }, - { X86_VENDOR_SIS, "SiS SiS SiS ", }, -}; - -static const char *x86_vendor_name[] = { - [X86_VENDOR_INTEL] = "Intel", - [X86_VENDOR_CYRIX] = "Cyrix", - [X86_VENDOR_AMD] = "AMD", - [X86_VENDOR_UMC] = "UMC", - [X86_VENDOR_NEXGEN] = "NexGen", - [X86_VENDOR_CENTAUR] = "Centaur", - [X86_VENDOR_RISE] = "Rise", - [X86_VENDOR_TRANSMETA] = "Transmeta", - [X86_VENDOR_NSC] = "NSC", - [X86_VENDOR_SIS] = "SiS", -}; - -static const char *cpu_vendor_name(int vendor) -{ - const char *name; - name = "<invalid cpu vendor>"; - if ((vendor < (ARRAY_SIZE(x86_vendor_name))) && - (x86_vendor_name[vendor] != 0)) - { - name = x86_vendor_name[vendor]; - } - return name; -} - -static void identify_cpu(struct device *cpu) -{ - char vendor_name[16]; - int i; - - vendor_name[0] = '\0'; /* Unset */ - -#ifndef __x86_64__ - /* Find the id and vendor_name */ - if (!cpu_have_cpuid()) { - /* Its a 486 if we can modify the AC flag */ - if (flag_is_changeable_p(X86_EFLAGS_AC)) { - cpu->device = 0x00000400; /* 486 */ - } else { - cpu->device = 0x00000300; /* 386 */ - } - if ((cpu->device == 0x00000400) && test_cyrix_52div()) { - memcpy(vendor_name, "CyrixInstead", 13); - /* If we ever care we can enable cpuid here */ - } - /* Detect NexGen with old hypercode */ - else if (deep_magic_nexgen_probe()) { - memcpy(vendor_name, "NexGenDriven", 13); - } - } -#endif - if (cpu_have_cpuid()) { - int cpuid_level; - struct cpuid_result result; - result = cpuid(0x00000000); - cpuid_level = result.eax; - vendor_name[ 0] = (result.ebx >> 0) & 0xff; - vendor_name[ 1] = (result.ebx >> 8) & 0xff; - vendor_name[ 2] = (result.ebx >> 16) & 0xff; - vendor_name[ 3] = (result.ebx >> 24) & 0xff; - vendor_name[ 4] = (result.edx >> 0) & 0xff; - vendor_name[ 5] = (result.edx >> 8) & 0xff; - vendor_name[ 6] = (result.edx >> 16) & 0xff; - vendor_name[ 7] = (result.edx >> 24) & 0xff; - vendor_name[ 8] = (result.ecx >> 0) & 0xff; - vendor_name[ 9] = (result.ecx >> 8) & 0xff; - vendor_name[10] = (result.ecx >> 16) & 0xff; - vendor_name[11] = (result.ecx >> 24) & 0xff; - vendor_name[12] = '\0'; - - /* Intel-defined flags: level 0x00000001 */ - if (cpuid_level >= 0x00000001) { - cpu->device = cpuid_eax(0x00000001); - } - else { - /* Have CPUID level 0 only unheard of */ - cpu->device = 0x00000400; - } - } - cpu->vendor = X86_VENDOR_UNKNOWN; - for(i = 0; i < ARRAY_SIZE(x86_vendors); i++) { - if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) { - cpu->vendor = x86_vendors[i].vendor; - break; - } - } -} - -struct cpu_driver *find_cpu_driver(struct device *cpu) -{ - struct cpu_driver *driver; - for (driver = cpu_drivers; driver < ecpu_drivers; driver++) { - struct cpu_device_id *id; - for (id = driver->id_table; - id->vendor != X86_VENDOR_INVALID; id++) { - if ((cpu->vendor == id->vendor) && - (cpu->device == id->device)) - { - return driver; - } - if (X86_VENDOR_ANY == id->vendor) - return driver; - } - } - return NULL; -} - -static void set_cpu_ops(struct device *cpu) -{ - struct cpu_driver *driver = find_cpu_driver(cpu); - cpu->ops = driver ? driver->ops : NULL; -} - -void cpu_initialize(unsigned int index) -{ - /* Because we busy wait at the printk spinlock. - * It is important to keep the number of printed messages - * from secondary cpus to a minimum, when debugging is - * disabled. - */ - struct device *cpu; - struct cpu_info *info; - struct cpuinfo_x86 c; - - info = cpu_info(); - - printk(BIOS_INFO, "Initializing CPU #%d\n", index); - - cpu = info->cpu; - if (!cpu) { - die("CPU: missing cpu device structure"); - } - - post_log_path(cpu); - - /* Find what type of cpu we are dealing with */ - identify_cpu(cpu); - printk(BIOS_DEBUG, "CPU: vendor %s device %x\n", - cpu_vendor_name(cpu->vendor), cpu->device); - - get_fms(&c, cpu->device); - - printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n", - c.x86, c.x86_model, c.x86_mask); - - /* Lookup the cpu's operations */ - set_cpu_ops(cpu); - - if(!cpu->ops) { - /* mask out the stepping and try again */ - cpu->device -= c.x86_mask; - set_cpu_ops(cpu); - cpu->device += c.x86_mask; - if(!cpu->ops) die("Unknown cpu"); - printk(BIOS_DEBUG, "Using generic cpu ops (good)\n"); - } - - - /* Initialize the cpu */ - if (cpu->ops && cpu->ops->init) { - cpu->enabled = 1; - cpu->initialized = 1; - cpu->ops->init(cpu); - } - post_log_clear(); - - printk(BIOS_INFO, "CPU #%d initialized\n", index); - - return; -} diff --git a/src/arch/x86/lib/cpu_common.c b/src/arch/x86/lib/cpu_common.c deleted file mode 100644 index af0ab2ae98..0000000000 --- a/src/arch/x86/lib/cpu_common.c +++ /dev/null @@ -1,65 +0,0 @@ -#include <console/console.h> -#include <cpu/cpu.h> -#include <arch/io.h> -#include <string.h> -#include <cpu/x86/mtrr.h> -#include <cpu/x86/msr.h> -#include <cpu/x86/lapic.h> -#include <arch/cpu.h> -#include <device/path.h> -#include <device/device.h> -#include <smp/spinlock.h> - -#ifndef __x86_64__ -/* Standard macro to see if a specific flag is changeable */ -static inline int flag_is_changeable_p(uint32_t flag) -{ - uint32_t f1, f2; - - asm( - "pushfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "movl %0,%1\n\t" - "xorl %2,%0\n\t" - "pushl %0\n\t" - "popfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "popfl\n\t" - : "=&r" (f1), "=&r" (f2) - : "ir" (flag)); - return ((f1^f2) & flag) != 0; -} - -/* Probe for the CPUID instruction */ -int cpu_have_cpuid(void) -{ - return flag_is_changeable_p(X86_EFLAGS_ID); -} - -#else - -int cpu_have_cpuid(void) -{ - return 1; -} -#endif - -int cpu_cpuid_extended_level(void) -{ - return cpuid_eax(0x80000000); -} - -int cpu_phys_address_size(void) -{ - if (!(cpu_have_cpuid())) - return 32; - - if (cpu_cpuid_extended_level() >= 0x80000008) - return cpuid_eax(0x80000008) & 0xff; - - if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36)) - return 36; - return 32; -} diff --git a/src/arch/x86/lib/ebda.c b/src/arch/x86/lib/ebda.c deleted file mode 100644 index 47dfbdb1e9..0000000000 --- a/src/arch/x86/lib/ebda.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <stdint.h> -#include <string.h> -#include <arch/io.h> -#include <arch/ebda.h> -#include <arch/acpi.h> - -void setup_ebda(u32 low_memory_size, u16 ebda_segment, u16 ebda_size) -{ - /* Skip in S3 resume path */ - if (acpi_is_wakeup_s3()) - return; - - if (!low_memory_size || !ebda_segment || !ebda_size) - return; - - /* clear BIOS DATA AREA */ - memset((void *)X86_BDA_BASE, 0, X86_BDA_SIZE); - - write16(X86_EBDA_LOWMEM, (low_memory_size >> 10)); - write16(X86_EBDA_SEGMENT, ebda_segment); - - /* Set up EBDA */ - memset((void *)((uintptr_t)ebda_segment << 4), 0, ebda_size); - write16((void*)((uintptr_t)ebda_segment << 4), (ebda_size >> 10)); -} - -void setup_default_ebda(void) -{ - setup_ebda(DEFAULT_EBDA_LOWMEM, - DEFAULT_EBDA_SEGMENT, - DEFAULT_EBDA_SIZE); -} diff --git a/src/arch/x86/lib/exception.c b/src/arch/x86/lib/exception.c deleted file mode 100644 index 65181e224e..0000000000 --- a/src/arch/x86/lib/exception.c +++ /dev/null @@ -1,511 +0,0 @@ -#include <console/console.h> -#include <console/streams.h> -#include <string.h> - -#if CONFIG_GDB_STUB - -/* BUFMAX defines the maximum number of characters in inbound/outbound buffers. - * At least NUM_REGBYTES*2 are needed for register packets - */ -#define BUFMAX 400 -enum regnames { - EAX = 0, ECX, EDX, EBX, ESP, EBP, ESI, EDI, - PC /* also known as eip */, - PS /* also known as eflags */, - CS, SS, DS, ES, FS, GS, - NUM_REGS /* Number of registers. */ -}; - -static uint32_t gdb_stub_registers[NUM_REGS]; - -#define GDB_SIG0 0 /* Signal 0 */ -#define GDB_SIGHUP 1 /* Hangup */ -#define GDB_SIGINT 2 /* Interrupt */ -#define GDB_SIGQUIT 3 /* Quit */ -#define GDB_SIGILL 4 /* Illegal instruction */ -#define GDB_SIGTRAP 5 /* Trace/breakpoint trap */ -#define GDB_SIGABRT 6 /* Aborted */ -#define GDB_SIGEMT 7 /* Emulation trap */ -#define GDB_SIGFPE 8 /* Arithmetic exception */ -#define GDB_SIGKILL 9 /* Killed */ -#define GDB_SIGBUS 10 /* Bus error */ -#define GDB_SIGSEGV 11 /* Segmentation fault */ -#define GDB_SIGSYS 12 /* Bad system call */ -#define GDB_SIGPIPE 13 /* Broken pipe */ -#define GDB_SIGALRM 14 /* Alarm clock */ -#define GDB_SIGTERM 15 /* Terminated */ -#define GDB_SIGURG 16 /* Urgent I/O condition */ -#define GDB_SIGSTOP 17 /* Stopped (signal) */ -#define GDB_SIGTSTP 18 /* Stopped (user) */ -#define GDB_SIGCONT 19 /* Continued */ -#define GDB_SIGCHLD 20 /* Child status changed */ -#define GDB_SIGTTIN 21 /* Stopped (tty input) */ -#define GDB_SIGTTOU 22 /* Stopped (tty output) */ -#define GDB_SIGIO 23 /* I/O possible */ -#define GDB_SIGXCPU 24 /* CPU time limit exceeded */ -#define GDB_SIGXFSZ 25 /* File size limit exceeded */ -#define GDB_SIGVTALRM 26 /* Virtual timer expired */ -#define GDB_SIGPROF 27 /* Profiling timer expired */ -#define GDB_SIGWINCH 28 /* Window size changed */ -#define GDB_SIGLOST 29 /* Resource lost */ -#define GDB_SIGUSR1 30 /* User defined signal 1 */ -#define GDB_SUGUSR2 31 /* User defined signal 2 */ -#define GDB_SIGPWR 32 /* Power fail/restart */ -#define GDB_SIGPOLL 33 /* Pollable event occurred */ -#define GDB_SIGWIND 34 /* SIGWIND */ -#define GDB_SIGPHONE 35 /* SIGPHONE */ -#define GDB_SIGWAITING 36 /* Process's LWPs are blocked */ -#define GDB_SIGLWP 37 /* Signal LWP */ -#define GDB_SIGDANGER 38 /* Swap space dangerously low */ -#define GDB_SIGGRANT 39 /* Monitor mode granted */ -#define GDB_SIGRETRACT 40 /* Need to relinquish monitor mode */ -#define GDB_SIGMSG 41 /* Monitor mode data available */ -#define GDB_SIGSOUND 42 /* Sound completed */ -#define GDB_SIGSAK 43 /* Secure attention */ -#define GDB_SIGPRIO 44 /* SIGPRIO */ - -#define GDB_SIG33 45 /* Real-time event 33 */ -#define GDB_SIG34 46 /* Real-time event 34 */ -#define GDB_SIG35 47 /* Real-time event 35 */ -#define GDB_SIG36 48 /* Real-time event 36 */ -#define GDB_SIG37 49 /* Real-time event 37 */ -#define GDB_SIG38 50 /* Real-time event 38 */ -#define GDB_SIG39 51 /* Real-time event 39 */ -#define GDB_SIG40 52 /* Real-time event 40 */ -#define GDB_SIG41 53 /* Real-time event 41 */ -#define GDB_SIG42 54 /* Real-time event 42 */ -#define GDB_SIG43 55 /* Real-time event 43 */ -#define GDB_SIG44 56 /* Real-time event 44 */ -#define GDB_SIG45 57 /* Real-time event 45 */ -#define GDB_SIG46 58 /* Real-time event 46 */ -#define GDB_SIG47 59 /* Real-time event 47 */ -#define GDB_SIG48 60 /* Real-time event 48 */ -#define GDB_SIG49 61 /* Real-time event 49 */ -#define GDB_SIG50 62 /* Real-time event 50 */ -#define GDB_SIG51 63 /* Real-time event 51 */ -#define GDB_SIG52 64 /* Real-time event 52 */ -#define GDB_SIG53 65 /* Real-time event 53 */ -#define GDB_SIG54 66 /* Real-time event 54 */ -#define GDB_SIG55 67 /* Real-time event 55 */ -#define GDB_SIG56 68 /* Real-time event 56 */ -#define GDB_SIG57 69 /* Real-time event 57 */ -#define GDB_SIG58 70 /* Real-time event 58 */ -#define GDB_SIG59 71 /* Real-time event 59 */ -#define GDB_SIG60 72 /* Real-time event 60 */ -#define GDB_SIG61 73 /* Real-time event 61 */ -#define GDB_SIG62 74 /* Real-time event 62 */ -#define GDB_SIG63 75 /* Real-time event 63 */ -#define GDB_SIGCANCEL 76 /* LWP internal signal */ -#define GDB_SIG32 77 /* Real-time event 32 */ -#define GDB_SIG64 78 /* Real-time event 64 */ -#define GDB_SIG65 79 /* Real-time event 65 */ -#define GDB_SIG66 80 /* Real-time event 66 */ -#define GDB_SIG67 81 /* Real-time event 67 */ -#define GDB_SIG68 82 /* Real-time event 68 */ -#define GDB_SIG69 83 /* Real-time event 69 */ -#define GDB_SIG70 84 /* Real-time event 70 */ -#define GDB_SIG71 85 /* Real-time event 71 */ -#define GDB_SIG72 86 /* Real-time event 72 */ -#define GDB_SIG73 87 /* Real-time event 73 */ -#define GDB_SIG74 88 /* Real-time event 74 */ -#define GDB_SIG75 89 /* Real-time event 75 */ -#define GDB_SIG76 90 /* Real-time event 76 */ -#define GDB_SIG77 91 /* Real-time event 77 */ -#define GDB_SIG78 92 /* Real-time event 78 */ -#define GDB_SIG79 93 /* Real-time event 79 */ -#define GDB_SIG80 94 /* Real-time event 80 */ -#define GDB_SIG81 95 /* Real-time event 81 */ -#define GDB_SIG82 96 /* Real-time event 82 */ -#define GDB_SIG83 97 /* Real-time event 83 */ -#define GDB_SIG84 98 /* Real-time event 84 */ -#define GDB_SIG85 99 /* Real-time event 85 */ -#define GDB_SIG86 100 /* Real-time event 86 */ -#define GDB_SIG87 101 /* Real-time event 87 */ -#define GDB_SIG88 102 /* Real-time event 88 */ -#define GDB_SIG89 103 /* Real-time event 89 */ -#define GDB_SIG90 104 /* Real-time event 90 */ -#define GDB_SIG91 105 /* Real-time event 91 */ -#define GDB_SIG92 106 /* Real-time event 92 */ -#define GDB_SIG93 107 /* Real-time event 93 */ -#define GDB_SIG94 108 /* Real-time event 94 */ -#define GDB_SIG95 109 /* Real-time event 95 */ -#define GDB_SIG96 110 /* Real-time event 96 */ -#define GDB_SIG97 111 /* Real-time event 97 */ -#define GDB_SIG98 112 /* Real-time event 98 */ -#define GDB_SIG99 113 /* Real-time event 99 */ -#define GDB_SIG100 114 /* Real-time event 100 */ -#define GDB_SIG101 115 /* Real-time event 101 */ -#define GDB_SIG102 116 /* Real-time event 102 */ -#define GDB_SIG103 117 /* Real-time event 103 */ -#define GDB_SIG104 118 /* Real-time event 104 */ -#define GDB_SIG105 119 /* Real-time event 105 */ -#define GDB_SIG106 120 /* Real-time event 106 */ -#define GDB_SIG107 121 /* Real-time event 107 */ -#define GDB_SIG108 122 /* Real-time event 108 */ -#define GDB_SIG109 123 /* Real-time event 109 */ -#define GDB_SIG110 124 /* Real-time event 110 */ -#define GDB_SIG111 125 /* Real-time event 111 */ -#define GDB_SIG112 126 /* Real-time event 112 */ -#define GDB_SIG113 127 /* Real-time event 113 */ -#define GDB_SIG114 128 /* Real-time event 114 */ -#define GDB_SIG115 129 /* Real-time event 115 */ -#define GDB_SIG116 130 /* Real-time event 116 */ -#define GDB_SIG117 131 /* Real-time event 117 */ -#define GDB_SIG118 132 /* Real-time event 118 */ -#define GDB_SIG119 133 /* Real-time event 119 */ -#define GDB_SIG120 134 /* Real-time event 120 */ -#define GDB_SIG121 135 /* Real-time event 121 */ -#define GDB_SIG122 136 /* Real-time event 122 */ -#define GDB_SIG123 137 /* Real-time event 123 */ -#define GDB_SIG124 138 /* Real-time event 124 */ -#define GDB_SIG125 139 /* Real-time event 125 */ -#define GDB_SIG126 140 /* Real-time event 126 */ -#define GDB_SIG127 141 /* Real-time event 127 */ -#define GDB_SIGINFO 142 /* Information request */ -#define GDB_UNKNOWN 143 /* Unknown signal */ -#define GDB_DEFAULT 144 /* error: default signal */ -/* Mach exceptions */ -#define GDB_EXC_BAD_ACCESS 145 /* Could not access memory */ -#define GDB_EXC_BAD_INSTRCTION 146 /* Illegal instruction/operand */ -#define GDB_EXC_ARITHMETIC 147 /* Arithmetic exception */ -#define GDB_EXC_EMULATION 148 /* Emulation instruction */ -#define GDB_EXC_SOFTWARE 149 /* Software generated exception */ -#define GDB_EXC_BREAKPOINT 150 /* Breakpoint */ - - - -static unsigned char exception_to_signal[] = -{ - [0] = GDB_SIGFPE, /* divide by zero */ - [1] = GDB_SIGTRAP, /* debug exception */ - [2] = GDB_SIGSEGV, /* NMI Interrupt */ - [3] = GDB_SIGTRAP, /* Breakpoint */ - [4] = GDB_SIGSEGV, /* into instruction (overflow) */ - [5] = GDB_SIGSEGV, /* bound instruction */ - [6] = GDB_SIGILL, /* Invalid opcode */ - [7] = GDB_SIGSEGV, /* coprocessor not available */ - [8] = GDB_SIGSEGV, /* double fault */ - [9] = GDB_SIGFPE, /* coprocessor segment overrun */ - [10] = GDB_SIGSEGV, /* Invalid TSS */ - [11] = GDB_SIGBUS, /* Segment not present */ - [12] = GDB_SIGBUS, /* stack exception */ - [13] = GDB_SIGSEGV, /* general protection */ - [14] = GDB_SIGSEGV, /* page fault */ - [15] = GDB_UNKNOWN, /* reserved */ - [16] = GDB_SIGEMT, /* coprocessor error */ - [17] = GDB_SIGBUS, /* alignment check */ - [18] = GDB_SIGSEGV, /* machine check */ - [19] = GDB_SIGFPE, /* simd floating point exception */ - [20] = GDB_UNKNOWN, - [21] = GDB_UNKNOWN, - [22] = GDB_UNKNOWN, - [23] = GDB_UNKNOWN, - [24] = GDB_UNKNOWN, - [25] = GDB_UNKNOWN, - [26] = GDB_UNKNOWN, - [27] = GDB_UNKNOWN, - [28] = GDB_UNKNOWN, - [29] = GDB_UNKNOWN, - [30] = GDB_UNKNOWN, - [31] = GDB_UNKNOWN, - [32] = GDB_SIGINT, /* User interrupt */ -}; - -static const char hexchars[] = "0123456789abcdef"; -static char in_buffer[BUFMAX]; -static char out_buffer[BUFMAX]; - - -static inline void stub_putc(int ch) -{ - gdb_tx_byte(ch); -} - -static inline void stub_flush(void) -{ - gdb_tx_flush(); -} - -static inline int stub_getc(void) -{ - return gdb_rx_byte(); -} - -static int hex(char ch) -{ - if ((ch >= 'a') && (ch <= 'f')) - return (ch - 'a' + 10); - if ((ch >= '0') && (ch <= '9')) - return (ch - '0'); - if ((ch >= 'A') && (ch <= 'F')) - return (ch - 'A' + 10); - return (-1); -} - -/* - * While we find hexadecimal digits, build an int. - * Fals is returned if nothing is parsed true otherwise. - */ -static int parse_ulong(char **ptr, unsigned long *value) -{ - int digit; - char *start; - - start = *ptr; - *value = 0; - - while((digit = hex(**ptr)) >= 0) { - *value = ((*value) << 4) | digit; - (*ptr)++; - } - return start != *ptr; -} - -/* convert the memory pointed to by mem into hex, placing result in buf */ -/* return a pointer to the last char put in buf (null) */ -static void copy_to_hex(char *buf, void *addr, unsigned long count) -{ - unsigned char ch; - char *mem = addr; - - while(count--) { - ch = *mem++; - *buf++ = hexchars[ch >> 4]; - *buf++ = hexchars[ch & 0x0f]; - } - *buf = 0; - return; -} - - -/* convert the hex array pointed to by buf into binary to be placed in mem */ -/* return a pointer to the character AFTER the last byte written */ -static void copy_from_hex(void *addr, char *buf, unsigned long count) -{ - unsigned char ch; - char *mem = addr; - - while(count--) { - ch = hex (*buf++) << 4; - ch = ch + hex (*buf++); - *mem++ = ch; - } -} - - -/* scan for the sequence $<data>#<checksum> */ - -static int get_packet(char *buffer) -{ - unsigned char checksum; - unsigned char xmitcsum; - int count; - char ch; - - /* Wishlit implement a timeout in get_packet */ - do { - /* wait around for the start character, ignore all other characters */ - while ((ch = (stub_getc() & 0x7f)) != '$'); - checksum = 0; - xmitcsum = -1; - - count = 0; - - /* now, read until a # or end of buffer is found */ - while (count < BUFMAX) { - ch = stub_getc() & 0x7f; - if (ch == '#') - break; - checksum = checksum + ch; - buffer[count] = ch; - count = count + 1; - } - buffer[count] = 0; - - if (ch == '#') { - xmitcsum = hex(stub_getc() & 0x7f) << 4; - xmitcsum += hex(stub_getc() & 0x7f); - - if (checksum != xmitcsum) { - stub_putc('-'); /* failed checksum */ - stub_flush(); - } - else { - stub_putc('+'); /* successful transfer */ - stub_flush(); - } - } - } while(checksum != xmitcsum); - return 1; -} - -/* send the packet in buffer.*/ -static void put_packet(char *buffer) -{ - unsigned char checksum; - int count; - char ch; - - /* $<packet info>#<checksum>. */ - do { - stub_putc('$'); - checksum = 0; - count = 0; - - while ((ch = buffer[count])) { - stub_putc(ch); - checksum += ch; - count += 1; - } - - stub_putc('#'); - stub_putc(hexchars[checksum >> 4]); - stub_putc(hexchars[checksum % 16]); - stub_flush(); - - } while ((stub_getc() & 0x7f) != '+'); - -} -#endif /* CONFIG_GDB_STUB */ - -#include <arch/registers.h> - -void x86_exception(struct eregs *info); - -void x86_exception(struct eregs *info) -{ -#if CONFIG_GDB_STUB - int signo; - memcpy(gdb_stub_registers, info, 8*sizeof(uint32_t)); - gdb_stub_registers[PC] = info->eip; - gdb_stub_registers[CS] = info->cs; - gdb_stub_registers[PS] = info->eflags; - signo = GDB_UNKNOWN; - if (info->vector < ARRAY_SIZE(exception_to_signal)) { - signo = exception_to_signal[info->vector]; - } - - /* reply to the host that an exception has occured */ - out_buffer[0] = 'S'; - out_buffer[1] = hexchars[(signo>>4) & 0xf]; - out_buffer[2] = hexchars[signo & 0xf]; - out_buffer[3] = '\0'; - put_packet(out_buffer); - - while(1) { - unsigned long addr, length; - char *ptr; - out_buffer[0] = '\0'; - out_buffer[1] = '\0'; - if (!get_packet(in_buffer)) { - break; - } - switch(in_buffer[0]) { - case '?': /* last signal */ - out_buffer[0] = 'S'; - out_buffer[1] = hexchars[(signo >> 4) & 0xf]; - out_buffer[2] = hexchars[signo & 0xf]; - out_buffer[3] = '\0'; - break; - case 'g': /* return the value of the cpu registers */ - copy_to_hex(out_buffer, &gdb_stub_registers, sizeof(gdb_stub_registers)); - break; - case 'G': /* set the value of the CPU registers - return OK */ - copy_from_hex(&gdb_stub_registers, in_buffer + 1, sizeof(gdb_stub_registers)); - memcpy(info, gdb_stub_registers, 8*sizeof(uint32_t)); - info->eip = gdb_stub_registers[PC]; - info->cs = gdb_stub_registers[CS]; - info->eflags = gdb_stub_registers[PS]; - memcpy(out_buffer, "OK",3); - break; - case 'm': - /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ - ptr = &in_buffer[1]; - if ( parse_ulong(&ptr, &addr) && - (*ptr++ == ',') && - parse_ulong(&ptr, &length)) { - copy_to_hex(out_buffer, (void *)addr, length); - } else { - memcpy(out_buffer, "E01", 4); - } - break; - case 'M': - /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ - ptr = &in_buffer[1]; - if ( parse_ulong(&ptr, &addr) && - (*(ptr++) == ',') && - parse_ulong(&ptr, &length) && - (*(ptr++) == ':')) { - copy_from_hex((void *)addr, ptr, length); - memcpy(out_buffer, "OK", 3); - } - else { - memcpy(out_buffer, "E02", 4); - } - break; - case 's': - case 'c': - /* cAA..AA Continue at address AA..AA(optional) */ - /* sAA..AA Step one instruction from AA..AA(optional) */ - ptr = &in_buffer[1]; - if (parse_ulong(&ptr, &addr)) { - info->eip = addr; - } - - /* Clear the trace bit */ - info->eflags &= ~(1 << 8); - /* Set the trace bit if we are single stepping */ - if (in_buffer[0] == 's') { - info->eflags |= (1 << 8); - } - return; - break; - case 'D': - memcpy(out_buffer, "OK", 3); - break; - case 'k': /* kill request? */ - break; - case 'q': /* query */ - break; - case 'z': /* z0AAAA,LLLL remove memory breakpoint */ - /* z1AAAA,LLLL remove hardware breakpoint */ - /* z2AAAA,LLLL remove write watchpoint */ - /* z3AAAA,LLLL remove read watchpoint */ - /* z4AAAA,LLLL remove access watchpoint */ - case 'Z': /* Z0AAAA,LLLL insert memory breakpoint */ - /* Z1AAAA,LLLL insert hardware breakpoint */ - /* Z2AAAA,LLLL insert write watchpoint */ - /* Z3AAAA,LLLL insert read watchpoint */ - /* Z4AAAA,LLLL insert access watchpoint */ - break; - default: - break; - } - put_packet(out_buffer); - } -#else /* !CONFIG_GDB_STUB */ -#define MDUMP_SIZE 0x80 - printk(BIOS_EMERG, - "Unexpected Exception: %d @ %02x:%08x - Halting\n" - "Code: %d eflags: %08x\n" - "eax: %08x ebx: %08x ecx: %08x edx: %08x\n" - "edi: %08x esi: %08x ebp: %08x esp: %08x\n", - info->vector, info->cs, info->eip, - info->error_code, info->eflags, - info->eax, info->ebx, info->ecx, info->edx, - info->edi, info->esi, info->ebp, info->esp); - u8 *code = (u8*)((uintptr_t)info->eip - (MDUMP_SIZE >>1)); - /* Align to 8-byte boundary please, and print eight bytes per row. - * This is done to make DRAM burst timing/reordering errors more - * evident from the looking at the dump */ - code = (u8*)((uintptr_t)code & ~0x7); - int i; - for(i = 0; i < MDUMP_SIZE; i++) - { - if( (i & 0x07) == 0 ) - printk(BIOS_EMERG, "\n%p:\t", code + i); - printk(BIOS_EMERG, "%.2x ", code[i]); - } - die(""); -#endif -} diff --git a/src/arch/x86/lib/id.inc b/src/arch/x86/lib/id.inc deleted file mode 100644 index f8aba0b946..0000000000 --- a/src/arch/x86/lib/id.inc +++ /dev/null @@ -1,18 +0,0 @@ - .section ".id", "a", @progbits - - .globl __id_start -__id_start: -ver: - .asciz COREBOOT_VERSION -vendor: - .asciz CONFIG_MAINBOARD_VENDOR -part: - .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end + CONFIG_ID_SECTION_OFFSET - ver /* Reverse offset to the vendor id */ -.long __id_end + CONFIG_ID_SECTION_OFFSET - vendor /* Reverse offset to the vendor id */ -.long __id_end + CONFIG_ID_SECTION_OFFSET - part /* Reverse offset to the part number */ -.long CONFIG_ROM_SIZE /* Size of this romimage */ - .globl __id_end - -__id_end: -.previous diff --git a/src/arch/x86/lib/id.ld b/src/arch/x86/lib/id.ld deleted file mode 100644 index cfd091dc17..0000000000 --- a/src/arch/x86/lib/id.ld +++ /dev/null @@ -1,6 +0,0 @@ -SECTIONS { - . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1; - .id (.): { - *(.id) - } -} diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c deleted file mode 100644 index 1b131278fd..0000000000 --- a/src/arch/x86/lib/ioapic.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <arch/io.h> -#include <arch/ioapic.h> -#include <console/console.h> -#include <cpu/x86/lapic.h> - -u32 io_apic_read(void *ioapic_base, u32 reg) -{ - write32(ioapic_base, reg); - return read32(ioapic_base + 0x10); -} - -void io_apic_write(void *ioapic_base, u32 reg, u32 value) -{ - write32(ioapic_base, reg); - write32(ioapic_base + 0x10, value); -} - -static int ioapic_interrupt_count(void *ioapic_base) -{ - /* Read the available number of interrupts. */ - int ioapic_interrupts = (io_apic_read(ioapic_base, 0x01) >> 16) & 0xff; - if (ioapic_interrupts == 0xff) - ioapic_interrupts = 23; - ioapic_interrupts += 1; /* Bits 23-16 specify the maximum redirection - entry, which is the number of interrupts - minus 1. */ - printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); - - return ioapic_interrupts; -} - -void clear_ioapic(void *ioapic_base) -{ - u32 low, high; - u32 i, ioapic_interrupts; - - printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at %p\n", ioapic_base); - - ioapic_interrupts = ioapic_interrupt_count(ioapic_base); - - low = DISABLED; - high = NONE; - - for (i = 0; i < ioapic_interrupts; i++) { - io_apic_write(ioapic_base, i * 2 + 0x10, low); - io_apic_write(ioapic_base, i * 2 + 0x11, high); - - printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", - i, high, low); - } - - if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) { - printk(BIOS_WARNING, "IOAPIC not responding.\n"); - return; - } -} - -void set_ioapic_id(void *ioapic_base, u8 ioapic_id) -{ - u32 bsp_lapicid = lapicid(); - int i; - - printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%p\n", - ioapic_base); - printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n", - bsp_lapicid); - - if (ioapic_id) { - printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id); - /* Set IOAPIC ID if it has been specified. */ - io_apic_write(ioapic_base, 0x00, - (io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) | - (ioapic_id << 24)); - } - - printk(BIOS_SPEW, "IOAPIC: Dumping registers\n"); - for (i = 0; i < 3; i++) - printk(BIOS_SPEW, " reg 0x%04x: 0x%08x\n", i, - io_apic_read(ioapic_base, i)); - -} - -static void load_vectors(void *ioapic_base) -{ - u32 bsp_lapicid = lapicid(); - u32 low, high; - u32 i, ioapic_interrupts; - - ioapic_interrupts = ioapic_interrupt_count(ioapic_base); - -#if CONFIG_IOAPIC_INTERRUPTS_ON_FSB - /* - * For the Pentium 4 and above APICs deliver their interrupts - * on the front side bus, enable that. - */ - printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); - io_apic_write(ioapic_base, 0x03, - io_apic_read(ioapic_base, 0x03) | (1 << 0)); -#endif -#if CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS - printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); - io_apic_write(ioapic_base, 0x03, 0); -#endif - - /* Enable Virtual Wire Mode. */ - low = ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT; - high = bsp_lapicid << (56 - 32); - - io_apic_write(ioapic_base, 0x10, low); - io_apic_write(ioapic_base, 0x11, high); - - if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) { - printk(BIOS_WARNING, "IOAPIC not responding.\n"); - return; - } - - printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", - 0, high, low); - low = DISABLED; - high = NONE; - for (i = 1; i < ioapic_interrupts; i++) { - io_apic_write(ioapic_base, i * 2 + 0x10, low); - io_apic_write(ioapic_base, i * 2 + 0x11, high); - - printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", - i, high, low); - } -} - -void setup_ioapic(void *ioapic_base, u8 ioapic_id) -{ - set_ioapic_id(ioapic_base, ioapic_id); - load_vectors(ioapic_base); -} diff --git a/src/arch/x86/lib/memcpy.c b/src/arch/x86/lib/memcpy.c deleted file mode 100644 index 4915a9eb51..0000000000 --- a/src/arch/x86/lib/memcpy.c +++ /dev/null @@ -1,22 +0,0 @@ -#include <string.h> - -void *memcpy(void *dest, const void *src, size_t n) -{ - unsigned long d0, d1, d2; - - asm volatile( -#ifdef __x86_64__ - "rep ; movsd\n\t" - "mov %4,%%rcx\n\t" -#else - "rep ; movsl\n\t" - "movl %4,%%ecx\n\t" -#endif - "rep ; movsb\n\t" - : "=&c" (d0), "=&D" (d1), "=&S" (d2) - : "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src) - : "memory" - ); - - return dest; -} diff --git a/src/arch/x86/lib/memmove.c b/src/arch/x86/lib/memmove.c deleted file mode 100644 index ba121278da..0000000000 --- a/src/arch/x86/lib/memmove.c +++ /dev/null @@ -1,187 +0,0 @@ -#include <string.h> - -void *memmove(void *dest, const void *src, size_t n) -{ - int d0,d1,d2,d3,d4,d5; - char *ret = dest; - - __asm__ __volatile__( - /* Handle more 16bytes in loop */ - "cmp $0x10, %0\n\t" - "jb 1f\n\t" - - /* Decide forward/backward copy mode */ - "cmp %2, %1\n\t" - "jb 2f\n\t" - - /* - * movs instruction have many startup latency - * so we handle small size by general register. - */ - "cmp $680, %0\n\t" - "jb 3f\n\t" - /* - * movs instruction is only good for aligned case. - */ - "mov %1, %3\n\t" - "xor %2, %3\n\t" - "and $0xff, %3\n\t" - "jz 4f\n\t" - "3:\n\t" - "sub $0x10, %0\n\t" - - /* - * We gobble 16byts forward in each loop. - */ - "3:\n\t" - "sub $0x10, %0\n\t" - "mov 0*4(%1), %3\n\t" - "mov 1*4(%1), %4\n\t" - "mov %3, 0*4(%2)\n\t" - "mov %4, 1*4(%2)\n\t" - "mov 2*4(%1), %3\n\t" - "mov 3*4(%1), %4\n\t" - "mov %3, 2*4(%2)\n\t" - "mov %4, 3*4(%2)\n\t" - "lea 0x10(%1), %1\n\t" - "lea 0x10(%2), %2\n\t" - "jae 3b\n\t" - "add $0x10, %0\n\t" - "jmp 1f\n\t" - - /* - * Handle data forward by movs. - */ - ".p2align 4\n\t" - "4:\n\t" - "mov -4(%1, %0), %3\n\t" - "lea -4(%2, %0), %4\n\t" - "shr $2, %0\n\t" - "rep movsl\n\t" - "mov %3, (%4)\n\t" - "jmp 11f\n\t" - /* - * Handle data backward by movs. - */ - ".p2align 4\n\t" - "6:\n\t" - "mov (%1), %3\n\t" - "mov %2, %4\n\t" - "lea -4(%1, %0), %1\n\t" - "lea -4(%2, %0), %2\n\t" - "shr $2, %0\n\t" - "std\n\t" - "rep movsl\n\t" - "mov %3,(%4)\n\t" - "cld\n\t" - "jmp 11f\n\t" - - /* - * Start to prepare for backward copy. - */ - ".p2align 4\n\t" - "2:\n\t" - "cmp $680, %0\n\t" - "jb 5f\n\t" - "mov %1, %3\n\t" - "xor %2, %3\n\t" - "and $0xff, %3\n\t" - "jz 6b\n\t" - - /* - * Calculate copy position to tail. - */ - "5:\n\t" - "add %0, %1\n\t" - "add %0, %2\n\t" - "sub $0x10, %0\n\t" - - /* - * We gobble 16byts backward in each loop. - */ - "7:\n\t" - "sub $0x10, %0\n\t" - - "mov -1*4(%1), %3\n\t" - "mov -2*4(%1), %4\n\t" - "mov %3, -1*4(%2)\n\t" - "mov %4, -2*4(%2)\n\t" - "mov -3*4(%1), %3\n\t" - "mov -4*4(%1), %4\n\t" - "mov %3, -3*4(%2)\n\t" - "mov %4, -4*4(%2)\n\t" - "lea -0x10(%1), %1\n\t" - "lea -0x10(%2), %2\n\t" - "jae 7b\n\t" - /* - * Calculate copy position to head. - */ - "add $0x10, %0\n\t" - "sub %0, %1\n\t" - "sub %0, %2\n\t" - - /* - * Move data from 8 bytes to 15 bytes. - */ - ".p2align 4\n\t" - "1:\n\t" - "cmp $8, %0\n\t" - "jb 8f\n\t" - "mov 0*4(%1), %3\n\t" - "mov 1*4(%1), %4\n\t" - "mov -2*4(%1, %0), %5\n\t" - "mov -1*4(%1, %0), %1\n\t" - - "mov %3, 0*4(%2)\n\t" - "mov %4, 1*4(%2)\n\t" - "mov %5, -2*4(%2, %0)\n\t" - "mov %1, -1*4(%2, %0)\n\t" - "jmp 11f\n\t" - - /* - * Move data from 4 bytes to 7 bytes. - */ - ".p2align 4\n\t" - "8:\n\t" - "cmp $4, %0\n\t" - "jb 9f\n\t" - "mov 0*4(%1), %3\n\t" - "mov -1*4(%1, %0), %4\n\t" - "mov %3, 0*4(%2)\n\t" - "mov %4, -1*4(%2, %0)\n\t" - "jmp 11f\n\t" - - /* - * Move data from 2 bytes to 3 bytes. - */ - ".p2align 4\n\t" - "9:\n\t" - "cmp $2, %0\n\t" - "jb 10f\n\t" - "movw 0*2(%1), %%dx\n\t" - "movw -1*2(%1, %0), %%bx\n\t" - "movw %%dx, 0*2(%2)\n\t" - "movw %%bx, -1*2(%2, %0)\n\t" - "jmp 11f\n\t" - - /* - * Move data for 1 byte. - */ - ".p2align 4\n\t" - "10:\n\t" - "cmp $1, %0\n\t" - "jb 11f\n\t" - "movb (%1), %%cl\n\t" - "movb %%cl, (%2)\n\t" - ".p2align 4\n\t" - "11:" - : "=&c" (d0), "=&S" (d1), "=&D" (d2), - "=r" (d3),"=r" (d4), "=r"(d5) - :"0" (n), - "1" (src), - "2" (dest) - :"memory"); - - return ret; - -} diff --git a/src/arch/x86/lib/memset.c b/src/arch/x86/lib/memset.c deleted file mode 100644 index d534556fd9..0000000000 --- a/src/arch/x86/lib/memset.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 1991,1992,1993,1997,1998,2003, 2005 Free Software Foundation, Inc. - * This file is part of the GNU C Library. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -/* From glibc-2.14, sysdeps/i386/memset.c */ - -#include <string.h> -#include <stdint.h> - -typedef uint32_t op_t; - -void *memset(void *dstpp, int c, size_t len) -{ - int d0; - unsigned long int dstp = (unsigned long int) dstpp; - - /* This explicit register allocation improves code very much indeed. */ - register op_t x asm("ax"); - - x = (unsigned char) c; - - /* Clear the direction flag, so filling will move forward. */ - asm volatile("cld"); - - /* This threshold value is optimal. */ - if (len >= 12) { - /* Fill X with four copies of the char we want to fill with. */ - x |= (x << 8); - x |= (x << 16); - - /* Adjust LEN for the bytes handled in the first loop. */ - len -= (-dstp) % sizeof(op_t); - - /* - * There are at least some bytes to set. No need to test for - * LEN == 0 in this alignment loop. - */ - - /* Fill bytes until DSTP is aligned on a longword boundary. */ - asm volatile( - "rep\n" - "stosb" /* %0, %2, %3 */ : - "=D" (dstp), "=c" (d0) : - "0" (dstp), "1" ((-dstp) % sizeof(op_t)), "a" (x) : - "memory"); - - /* Fill longwords. */ - asm volatile( - "rep\n" - "stosl" /* %0, %2, %3 */ : - "=D" (dstp), "=c" (d0) : - "0" (dstp), "1" (len / sizeof(op_t)), "a" (x) : - "memory"); - len %= sizeof(op_t); - } - - /* Write the last few bytes. */ - asm volatile( - "rep\n" - "stosb" /* %0, %2, %3 */ : - "=D" (dstp), "=c" (d0) : - "0" (dstp), "1" (len), "a" (x) : - "memory"); - - return dstpp; -} diff --git a/src/arch/x86/lib/mmap_boot.c b/src/arch/x86/lib/mmap_boot.c deleted file mode 100644 index 4dd269b772..0000000000 --- a/src/arch/x86/lib/mmap_boot.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <boot_device.h> -#include <console/console.h> -#include <cbfs.h> -#include <endian.h> -#include <stdlib.h> - -/* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */ -#define rom_base ((void *)(uintptr_t)(-(int32_t)CONFIG_ROM_SIZE)) - -static const struct mem_region_device boot_dev = - MEM_REGION_DEV_INIT(rom_base, CONFIG_ROM_SIZE); - -const struct region_device *boot_device_ro(void) -{ - return &boot_dev.rdev; -} - -int cbfs_boot_region_properties(struct cbfs_props *props) -{ - struct cbfs_header header; - int32_t offset; - const struct region_device *bdev; - - bdev = boot_device_ro(); - - rdev_readat(bdev, &offset, CONFIG_ROM_SIZE - sizeof(offset), - sizeof(offset)); - - /* The offset is relative to the end of the media. */ - offset += CONFIG_ROM_SIZE; - - rdev_readat(bdev, &header , offset, sizeof(header)); - - header.magic = ntohl(header.magic); - header.romsize = ntohl(header.romsize); - header.bootblocksize = ntohl(header.bootblocksize); - header.align = ntohl(header.align); - header.offset = ntohl(header.offset); - - if (header.magic != CBFS_HEADER_MAGIC) - return -1; - - props->align = header.align; - props->offset = header.offset; - if (CONFIG_ROM_SIZE != header.romsize) - props->size = CONFIG_ROM_SIZE; - else - props->size = header.romsize; - props->size -= props->offset; - props->size -= header.bootblocksize; - props->size = ALIGN_DOWN(props->size, props->align); - - printk(BIOS_DEBUG, "CBFS @ %zx size %zx\n", props->offset, props->size); - - return 0; -} diff --git a/src/arch/x86/lib/pci_ops_conf1.c b/src/arch/x86/lib/pci_ops_conf1.c deleted file mode 100644 index 77df4b314f..0000000000 --- a/src/arch/x86/lib/pci_ops_conf1.c +++ /dev/null @@ -1,71 +0,0 @@ -#include <console/console.h> -#include <arch/io.h> -#include <arch/pciconf.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -/* - * Functions for accessing PCI configuration space with type 1 accesses - */ - -#if !CONFIG_PCI_IO_CFG_EXT -#define CONFIG_CMD(bus,devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | (where & ~3)) -#else -#define CONFIG_CMD(bus,devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | ((where & 0xff) & ~3) |\ - ((where & 0xf00)<<16)) -#endif - -static uint8_t pci_conf1_read_config8(struct bus *pbus, int bus, int devfn, - int where) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - return inb(0xCFC + (where & 3)); -} - -static uint16_t pci_conf1_read_config16(struct bus *pbus, int bus, int devfn, - int where) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - return inw(0xCFC + (where & 2)); -} - -static uint32_t pci_conf1_read_config32(struct bus *pbus, int bus, int devfn, - int where) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - return inl(0xCFC); -} - -static void pci_conf1_write_config8(struct bus *pbus, int bus, int devfn, - int where, uint8_t value) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - outb(value, 0xCFC + (where & 3)); -} - -static void pci_conf1_write_config16(struct bus *pbus, int bus, int devfn, - int where, uint16_t value) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - outw(value, 0xCFC + (where & 2)); -} - -static void pci_conf1_write_config32(struct bus *pbus, int bus, int devfn, - int where, uint32_t value) -{ - outl(CONFIG_CMD(bus, devfn, where), 0xCF8); - outl(value, 0xCFC); -} - -#undef CONFIG_CMD - -const struct pci_bus_operations pci_cf8_conf1 = { - .read8 = pci_conf1_read_config8, - .read16 = pci_conf1_read_config16, - .read32 = pci_conf1_read_config32, - .write8 = pci_conf1_write_config8, - .write16 = pci_conf1_write_config16, - .write32 = pci_conf1_write_config32, -}; diff --git a/src/arch/x86/lib/pci_ops_mmconf.c b/src/arch/x86/lib/pci_ops_mmconf.c deleted file mode 100644 index e4fa128551..0000000000 --- a/src/arch/x86/lib/pci_ops_mmconf.c +++ /dev/null @@ -1,61 +0,0 @@ -#include <console/console.h> -#include <arch/io.h> -#include <arch/pciconf.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> - -/* - * Functions for accessing PCI configuration space with mmconf accesses - */ - -#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK) \ - ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\ - (((SEGBUS) & 0xFFF) << 20) |\ - (((DEVFN) & 0xFF) << 12) |\ - ((WHERE) & 0xFFF)) & ~MASK)) - -static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn, - int where) -{ - return read8(PCI_MMIO_ADDR(bus, devfn, where, 0)); -} - -static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn, - int where) -{ - return read16(PCI_MMIO_ADDR(bus, devfn, where, 1)); -} - -static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn, - int where) -{ - return read32(PCI_MMIO_ADDR(bus, devfn, where, 3)); -} - -static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn, - int where, uint8_t value) -{ - write8(PCI_MMIO_ADDR(bus, devfn, where, 0), value); -} - -static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn, - int where, uint16_t value) -{ - write16(PCI_MMIO_ADDR(bus, devfn, where, 1), value); -} - -static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn, - int where, uint32_t value) -{ - write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value); -} - -const struct pci_bus_operations pci_ops_mmconf = { - .read8 = pci_mmconf_read_config8, - .read16 = pci_mmconf_read_config16, - .read32 = pci_mmconf_read_config32, - .write8 = pci_mmconf_write_config8, - .write16 = pci_mmconf_write_config16, - .write32 = pci_mmconf_write_config32, -}; diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c deleted file mode 100644 index bfc35bc74c..0000000000 --- a/src/arch/x86/lib/romcc_console.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <build.h> -#include <console/streams.h> -#include <console/early_print.h> -#include <console/loglevel.h> - -/* Include the sources. */ -#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO -#include "drivers/uart/util.c" -#include "drivers/uart/uart8250io.c" -#endif -#if CONFIG_CONSOLE_NE2K -#include "drivers/net/ne2k.c" -#endif - -void console_hw_init(void) -{ -#if CONFIG_CONSOLE_SERIAL - uart_init(CONFIG_UART_FOR_CONSOLE); -#endif -#if CONFIG_CONSOLE_NE2K - ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT); -#endif -} - -void console_tx_byte(unsigned char byte) -{ -#if CONFIG_CONSOLE_SERIAL - uart_tx_byte(CONFIG_UART_FOR_CONSOLE, byte); -#endif -#if CONFIG_CONSOLE_NE2K - ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); -#endif -} - -void console_tx_flush(void) -{ -#if CONFIG_CONSOLE_SERIAL - uart_tx_flush(CONFIG_UART_FOR_CONSOLE); -#endif -#if CONFIG_CONSOLE_NE2K - ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); -#endif -} - -#include <console/early_print.c> -#include <console/post.c> -#include <console/die.c> - -void console_init(void) -{ - static const char console_test[] = - "\n\ncoreboot-" - COREBOOT_VERSION - COREBOOT_EXTRA_VERSION - " " - COREBOOT_BUILD - " romstage starting...\n"; - - console_hw_init(); - - print_info(console_test); -} - -void die(const char *msg) -{ - print_emerg(msg); - halt(); -} diff --git a/src/arch/x86/lib/stages.c b/src/arch/x86/lib/stages.c deleted file mode 100644 index c06abe6793..0000000000 --- a/src/arch/x86/lib/stages.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static void skip_romstage(void) -{ - asm volatile ( - "jmp __main\n" - ); -} diff --git a/src/arch/x86/lib/thread.c b/src/arch/x86/lib/thread.c deleted file mode 100644 index f81a2d20ca..0000000000 --- a/src/arch/x86/lib/thread.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <thread.h> - -/* The stack frame looks like the following after a pushad instruction. */ -struct pushad_regs { - uint32_t edi; /* Offset 0x00 */ - uint32_t esi; /* Offset 0x04 */ - uint32_t ebp; /* Offset 0x08 */ - uint32_t esp; /* Offset 0x0c */ - uint32_t ebx; /* Offset 0x10 */ - uint32_t edx; /* Offset 0x14 */ - uint32_t ecx; /* Offset 0x18 */ - uint32_t eax; /* Offset 0x1c */ -}; - -static inline uintptr_t push_stack(uintptr_t cur_stack, uintptr_t value) -{ - uintptr_t *addr; - - cur_stack -= sizeof(value); - addr = (uintptr_t *)cur_stack; - *addr = value; - return cur_stack; -} - -void arch_prepare_thread(struct thread *t, - void asmlinkage (*thread_entry)(void *), void *arg) -{ - uintptr_t stack = t->stack_current; - - /* Imitate thread_entry(t) with return address of 0. thread_entry() - * is assumed to never return. */ - stack = push_stack(stack, (uintptr_t)arg); - stack = push_stack(stack, (uintptr_t)0); - stack = push_stack(stack, (uintptr_t)thread_entry); - /* Make room for the registers. Ignore intial values. */ - stack -= sizeof(struct pushad_regs); - - t->stack_current = stack; -} - -void *arch_get_thread_stackbase(void) -{ - /* defined in c_start.S */ - extern u8 thread_stacks[]; - return &thread_stacks[0]; -} diff --git a/src/arch/x86/lib/thread_switch.S b/src/arch/x86/lib/thread_switch.S deleted file mode 100644 index 52d4d3094b..0000000000 --- a/src/arch/x86/lib/thread_switch.S +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ -.code32 -.text - -/* - * stack layout after pushad: - * +------------+ - * | save stack | <-- esp + 0x28 - * +------------+ - * | new stack | <-- esp + 0x24 - * +------------+ - * | ret addr | <-- esp + 0x20 - * +------------+ - * | eax | <-- esp + 0x1c - * +------------+ - * | ecx | <-- esp + 0x18 - * +------------+ - * | edx | <-- esp + 0x14 - * +------------+ - * | ebx | <-- esp + 0x10 - * +------------+ - * | orig esp | <-- esp + 0x0c - * +------------+ - * | ebp | <-- esp + 0x08 - * +------------+ - * | esi | <-- esp + 0x04 - * +------------+ - * | edi | <-- esp + 0x00 - * +------------+ - */ -.globl switch_to_thread -switch_to_thread: - pusha - /* Save the current stack */ - movl 0x28(%esp), %ebx - movl %esp, (%ebx) - /* Switch to the new stack. */ - movl 0x24(%esp), %eax - movl %eax, %esp - popa - ret diff --git a/src/arch/x86/lib/timestamp.c b/src/arch/x86/lib/timestamp.c deleted file mode 100644 index 9df505a570..0000000000 --- a/src/arch/x86/lib/timestamp.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <cpu/x86/tsc.h> -#include <timestamp.h> - -uint64_t timestamp_get(void) -{ - return rdtscll(); -} diff --git a/src/arch/x86/lib/walkcbfs.S b/src/arch/x86/lib/walkcbfs.S deleted file mode 100644 index 60eb8b53b0..0000000000 --- a/src/arch/x86/lib/walkcbfs.S +++ /dev/null @@ -1,117 +0,0 @@ -#define CBFS_HEADER_PTR 0xfffffffc - -#define CBFS_HEADER_MAGIC 0 -#define CBFS_HEADER_VERSION (CBFS_HEADER_MAGIC + 4) -#define CBFS_HEADER_ROMSIZE (CBFS_HEADER_VERSION + 4) -#define CBFS_HEADER_BOOTBLOCKSIZE (CBFS_HEADER_ROMSIZE + 4) -#define CBFS_HEADER_ALIGN (CBFS_HEADER_BOOTBLOCKSIZE + 4) -#define CBFS_HEADER_OFFSET (CBFS_HEADER_ALIGN + 4) - -#define CBFS_FILE_MAGIC 0 -#define CBFS_FILE_LEN (CBFS_FILE_MAGIC + 8) -#define CBFS_FILE_TYPE (CBFS_FILE_LEN + 4) -#define CBFS_FILE_CHECKSUM (CBFS_FILE_TYPE + 4) -#define CBFS_FILE_OFFSET (CBFS_FILE_CHECKSUM + 4) - -#define CBFS_FILE_STRUCTSIZE (CBFS_FILE_OFFSET + 4) - -/* - * input %esi: filename - * input %esp: return address (not pointer to return address!) - * output %eax: pointer to CBFS header - * clobbers %ebx, %ecx, %edi - */ -walkcbfs_asm: - cld - - mov CBFS_HEADER_PTR, %eax - mov CBFS_HEADER_ROMSIZE(%eax), %ecx - bswap %ecx - mov $0, %ebx - sub %ecx, %ebx /* rom base address in ebx */ - mov CBFS_HEADER_OFFSET(%eax), %ecx - bswap %ecx - add %ecx, %ebx /* address where we start looking for LARCHIVEs */ - - /* determine filename length */ - mov $0, %eax -1: - cmpb $0, (%eax,%esi) - jz 2f - add $1, %eax - jmp 1b -2: - add $1, %eax -walker: - mov 0(%ebx), %edi /* Check for LARCHIVE header */ - cmp %edi, filemagic - jne searchfile - mov 4(%ebx), %edi - cmp %edi, filemagic+4 - jne searchfile - - /* LARCHIVE header found */ - mov %ebx, %edi - add $CBFS_FILE_STRUCTSIZE, %edi /* edi = address of first byte after struct cbfs_file */ - mov %eax, %ecx - repe cmpsb - /* zero flag set if strings are equal */ - jnz tryharder - - /* we found it! */ - mov %ebx, %eax - jmp *%esp - -tryharder: - sub %ebx, %edi - sub $CBFS_FILE_STRUCTSIZE, %edi /* edi = # of walked bytes */ - sub %edi, %esi /* esi = start of filename */ - - /* ebx = ecx = (current+offset+len+ALIGN-1) & ~(ALIGN-1) */ - mov CBFS_FILE_OFFSET(%ebx), %ecx - bswap %ecx - add %ebx, %ecx - mov CBFS_FILE_LEN(%ebx), %edi - bswap %edi - add %edi, %ecx - mov CBFS_HEADER_PTR, %edi - mov CBFS_HEADER_ALIGN(%edi), %edi - bswap %edi - sub $1, %edi - add %edi, %ecx - not %edi - and %edi, %ecx - - /* if oldaddr >= addr, leave */ - cmp %ebx, %ecx - jbe out - - mov %ecx, %ebx - -check_for_exit: - /* look if we should exit: did we pass into the bootblock already? */ - mov CBFS_HEADER_PTR, %ecx - mov CBFS_HEADER_BOOTBLOCKSIZE(%ecx), %ecx - bswap %ecx - not %ecx - add $1, %ecx - - cmp %ecx, %ebx - /* if bootblockstart >= addr (==we're still in the data area) , jump back */ - jbe walker - -out: - mov $0, %eax - jmp *%esp - - -searchfile: - /* if filemagic isn't found, move forward cbfs_header->align bytes */ - mov CBFS_HEADER_PTR, %edi - mov CBFS_HEADER_ALIGN(%edi), %edi - bswap %edi - add %edi, %ebx - jmp check_for_exit - -filemagic: - .ascii "LARCHIVE" |