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author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 15:18:22 -0700 |
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committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 03:18:24 +0100 |
commit | 6f80ccc357702f87baf43440d97a49bcce999393 (patch) | |
tree | 645c4e00d5e0314b1f3e54c74016d6ee82e575c7 /src/arch/x86/pci_ops_conf1.c | |
parent | e5f29e8bf8c928a83764fcf428c1a05767bff7dd (diff) | |
download | coreboot-6f80ccc357702f87baf43440d97a49bcce999393.tar.xz |
arch/x86: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:
WARNING: line over 80 characters
TEST=Build and run on Galileo Gen2
Change-Id: I3495cd30d1737d9ee728c8a9e72bd426d7a69c37
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18864
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/pci_ops_conf1.c')
-rw-r--r-- | src/arch/x86/pci_ops_conf1.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 61d1d969f7..820744c74b 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -22,11 +22,11 @@ #if !CONFIG_PCI_IO_CFG_EXT #define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | (where & ~3)) + (devfn << 8) | (where & ~3)) #else #define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | ((where & 0xff) & ~3) |\ - ((where & 0xf00)<<16)) + (devfn << 8) | ((where & 0xff) & ~3) |\ + ((where & 0xf00)<<16)) #endif static uint8_t pci_conf1_read_config8(struct bus *pbus, int bus, int devfn, |