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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-09-23 11:49:17 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-30 12:02:35 +0000 |
| commit | 50b4f78344e800bdfe9ef7d2b64331a24191e112 (patch) | |
| tree | 72ecad27649631ef97be3b522543a507437ca2d7 /src/arch/x86 | |
| parent | ebf201b8f563ece11ceb60d81ba9cd676020da42 (diff) | |
| download | coreboot-50b4f78344e800bdfe9ef7d2b64331a24191e112.tar.xz | |
sb/intel/spi: Use different SPIOPS for most SST flashes
Many supported SST flashes use the AAI OP (0xad) to write.
TESTED on Thinkpad X60 with SST25VF016B, flashrom can use AAI_WRITE op
with locked down SPIOPS.
Change-Id: Ica72eda04a8d9f4e563987871b1640565c6e7e12
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch/x86')
0 files changed, 0 insertions, 0 deletions