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| author | Patrick Rudolph <siro@das-labor.org> | 2015-07-12 12:17:21 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-13 01:59:43 +0200 |
| commit | 6f7ce9b2172297b56c4b255a1c322b576a4583b8 (patch) | |
| tree | b8ee50a6d9149e6870236c909a827d66f66315ac /src/arch/x86 | |
| parent | 073b017bed5e51244f0578056d52e6f88734d64b (diff) | |
| download | coreboot-6f7ce9b2172297b56c4b255a1c322b576a4583b8.tar.xz | |
intel raminit: fix timB high adjust calculation
Issue observed:
Any memory DIMM placed in channel0 slots stops at "c320c discovery failed".
The same memory DIMM works when placed in channel1 slots.
Test system:
* Intel Pentium CPU G2130
* Gigabyte GA-B75M-D3H
* DIMMs:
* elixir 1GB 1Rx8 PC3-10600U M2Y1G64CB88A5N
* crucial 2GB 256Mx64 CT2566aBA160BJ
* corsair 8GB CMZ16GX3M2A1866C9
Problem description:
In case of good timmings (all bits are set) an offset of 3*64 was applied.
The following test (c320c discovery) failed only on those byte-lanes.
Problem solution:
Don't modify timB in case of good timings measured.
Final testing result:
The system boots with every DIMM placed in channel 0 slots.
Change-Id: Iea426ea4470640ce254f16e958a395644ff1a55c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: http://review.coreboot.org/10889
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Diffstat (limited to 'src/arch/x86')
0 files changed, 0 insertions, 0 deletions