diff options
author | Martin Roth <martinroth@google.com> | 2017-06-01 11:39:59 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-07 16:05:16 +0000 |
commit | 898a77521de97b1e4af9458b82bcc21bc7a6e799 (patch) | |
tree | 4565d11cc5bbed7729b580424006e1745dc0cfc9 /src/arch/x86 | |
parent | 50bda05e46d5f34f6519a7814e843d1e777ecf10 (diff) | |
download | coreboot-898a77521de97b1e4af9458b82bcc21bc7a6e799.tar.xz |
arch/*: Update Kconfig symbol usage
- Update all symbols to use IS_ENABLED()
- Update non-romcc usage to use 'if' instead of '#if' where it
makes sense.
Change-Id: I5a84414d2d1631e35ac91efb67a0d4c1f673bf85
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20005
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/acpi_s3.c | 18 | ||||
-rw-r--r-- | src/arch/x86/bootblock_normal.c | 2 | ||||
-rw-r--r-- | src/arch/x86/bootblock_simple.c | 6 | ||||
-rw-r--r-- | src/arch/x86/c_start.S | 8 | ||||
-rw-r--r-- | src/arch/x86/exception.c | 4 | ||||
-rw-r--r-- | src/arch/x86/include/arch/pirq_routing.h | 11 | ||||
-rw-r--r-- | src/arch/x86/ioapic.c | 26 | ||||
-rw-r--r-- | src/arch/x86/pirq_routing.c | 20 | ||||
-rw-r--r-- | src/arch/x86/romcc_console.c | 16 | ||||
-rw-r--r-- | src/arch/x86/smbios.c | 23 |
10 files changed, 63 insertions, 71 deletions
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index 61955f5b8e..a0a790567e 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -247,16 +247,16 @@ void __attribute__((weak)) mainboard_suspend_resume(void) void acpi_resume(void *wake_vec) { -#if CONFIG_HAVE_SMI_HANDLER - u32 *gnvs_address = cbmem_find(CBMEM_ID_ACPI_GNVS_PTR); - - /* Restore GNVS pointer in SMM if found */ - if (gnvs_address && *gnvs_address) { - printk(BIOS_DEBUG, "Restore GNVS pointer to 0x%08x\n", - *gnvs_address); - smm_setup_structures((void *)*gnvs_address, NULL, NULL); + if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { + u32 *gnvs_address = cbmem_find(CBMEM_ID_ACPI_GNVS_PTR); + + /* Restore GNVS pointer in SMM if found */ + if (gnvs_address && *gnvs_address) { + printk(BIOS_DEBUG, "Restore GNVS pointer to 0x%08x\n", + *gnvs_address); + smm_setup_structures((void *)*gnvs_address, NULL, NULL); + } } -#endif /* Call mainboard resume handler first, if defined. */ mainboard_suspend_resume(); diff --git a/src/arch/x86/bootblock_normal.c b/src/arch/x86/bootblock_normal.c index caffb9117b..423046906e 100644 --- a/src/arch/x86/bootblock_normal.c +++ b/src/arch/x86/bootblock_normal.c @@ -32,7 +32,7 @@ static void main(unsigned long bist) if (boot_cpu()) { bootblock_mainboard_init(); -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) sanitize_cmos(); #endif boot_mode = do_normal_boot(); diff --git a/src/arch/x86/bootblock_simple.c b/src/arch/x86/bootblock_simple.c index 5df279c370..52c45be43d 100644 --- a/src/arch/x86/bootblock_simple.c +++ b/src/arch/x86/bootblock_simple.c @@ -20,15 +20,15 @@ static void main(unsigned long bist) if (boot_cpu()) { bootblock_mainboard_init(); -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) sanitize_cmos(); #endif -#if CONFIG_CMOS_POST +#if IS_ENABLED(CONFIG_CMOS_POST) cmos_post_init(); #endif } -#if CONFIG_VBOOT_SEPARATE_VERSTAGE +#if IS_ENABLED(CONFIG_VBOOT_SEPARATE_VERSTAGE) const char *target1 = "fallback/verstage"; #else const char *target1 = "fallback/romstage"; diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 9ad2698483..97e2b5adc4 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -23,7 +23,7 @@ _stack: .space CONFIG_MAX_CPUS*CONFIG_STACK_SIZE _estack: -#if CONFIG_COOP_MULTITASKING +#if IS_ENABLED(CONFIG_COOP_MULTITASKING) .global thread_stacks thread_stacks: .space CONFIG_STACK_SIZE*CONFIG_NUM_THREADS @@ -73,7 +73,7 @@ _start: /* set new stack */ movl $_estack, %esp -#if CONFIG_COOP_MULTITASKING +#if IS_ENABLED(CONFIG_COOP_MULTITASKING) /* Push the thread pointer. */ push $0 #endif @@ -112,7 +112,7 @@ _start: andl $0xFFFFFFF0, %esp -#if CONFIG_GDB_WAIT +#if IS_ENABLED(CONFIG_GDB_WAIT) call gdb_hw_init call gdb_stub_breakpoint #endif @@ -294,7 +294,7 @@ int_hand: iret -#if CONFIG_GDB_WAIT +#if IS_ENABLED(CONFIG_GDB_WAIT) .globl gdb_stub_breakpoint gdb_stub_breakpoint: diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c index 9121738090..36697c6b91 100644 --- a/src/arch/x86/exception.c +++ b/src/arch/x86/exception.c @@ -15,7 +15,7 @@ #include <console/streams.h> #include <string.h> -#if CONFIG_GDB_STUB +#if IS_ENABLED(CONFIG_GDB_STUB) /* BUFMAX defines the maximum number of characters in inbound/outbound buffers. * At least NUM_REGBYTES*2 are needed for register packets @@ -387,7 +387,7 @@ void x86_exception(struct eregs *info); void x86_exception(struct eregs *info) { -#if CONFIG_GDB_STUB +#if IS_ENABLED(CONFIG_GDB_STUB) int signo; memcpy(gdb_stub_registers, info, 8*sizeof(uint32_t)); gdb_stub_registers[PC] = info->eip; diff --git a/src/arch/x86/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h index ed80ce53ac..5236b90f7e 100644 --- a/src/arch/x86/include/arch/pirq_routing.h +++ b/src/arch/x86/include/arch/pirq_routing.h @@ -24,10 +24,9 @@ * This tells us that in the PIRQ table, we are going to have 4 link-bitmap * entries per PCI device * It is fixed at 4: INTA, INTB, INTC, and INTD - * CAUTION: If you change this, pirq_routing will not work correctly*/ + * CAUTION: If you change this, pirq_routing will not work correctly */ #define MAX_INTX_ENTRIES 4 -#if IS_ENABLED(CONFIG_GENERATE_PIRQ_TABLE) #include <stdint.h> #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24)) @@ -60,13 +59,7 @@ unsigned long copy_pirq_routing_table(unsigned long addr, const struct irq_routing_table *routing_table); unsigned long write_pirq_routing_table(unsigned long start); -#if IS_ENABLED(CONFIG_PIRQ_ROUTE) void pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]); -#endif - -#else -#define copy_pirq_routing_table(start) (start) -#define write_pirq_routing_table(start) (start) -#endif #endif /* ARCH_PIRQ_ROUTING_H */ + diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c index 25fc84c620..dba49c06b8 100644 --- a/src/arch/x86/ioapic.c +++ b/src/arch/x86/ioapic.c @@ -103,19 +103,19 @@ static void load_vectors(void *ioapic_base) ioapic_interrupts = ioapic_interrupt_count(ioapic_base); -#if CONFIG_IOAPIC_INTERRUPTS_ON_FSB - /* - * For the Pentium 4 and above APICs deliver their interrupts - * on the front side bus, enable that. - */ - printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); - io_apic_write(ioapic_base, 0x03, - io_apic_read(ioapic_base, 0x03) | (1 << 0)); -#endif -#if CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS - printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); - io_apic_write(ioapic_base, 0x03, 0); -#endif + if (IS_ENABLED(CONFIG_IOAPIC_INTERRUPTS_ON_FSB)) { + /* + * For the Pentium 4 and above APICs deliver their interrupts + * on the front side bus, enable that. + */ + printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); + io_apic_write(ioapic_base, 0x03, + io_apic_read(ioapic_base, 0x03) | (1 << 0)); + } else if (IS_ENABLED(CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS)) { + printk(BIOS_DEBUG, + "IOAPIC: Enabling interrupts on APIC serial bus\n"); + io_apic_write(ioapic_base, 0x03, 0); + } /* Enable Virtual Wire Mode. */ low = ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT; diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 405dad0ed4..892201e57c 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -18,8 +18,12 @@ #include <arch/pirq_routing.h> #include <string.h> #include <device/pci.h> +#include <arch/pirq_routing.h> + +void __attribute__((weak)) pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]) +{ +} -#if CONFIG_DEBUG_PIRQ static void check_pirq_routing_table(struct irq_routing_table *rt) { uint8_t *addr = (uint8_t *)rt; @@ -97,9 +101,7 @@ static int verify_copy_pirq_routing_table(unsigned long addr, return 0; } -#endif -#if CONFIG_PIRQ_ROUTE static u8 pirq_get_next_free_irq(u8 *pirq, u16 bitmap) { int i, link; @@ -185,7 +187,6 @@ static void pirq_route_irqs(unsigned long addr) pirq_assign_irqs(pirq); } -#endif unsigned long copy_pirq_routing_table(unsigned long addr, const struct irq_routing_table *routing_table) @@ -198,11 +199,10 @@ unsigned long copy_pirq_routing_table(unsigned long addr, addr); memcpy((void *)addr, routing_table, routing_table->size); printk(BIOS_INFO, "done.\n"); -#if CONFIG_DEBUG_PIRQ - verify_copy_pirq_routing_table(addr, routing_table); -#endif -#if CONFIG_PIRQ_ROUTE - pirq_route_irqs(addr); -#endif + if (IS_ENABLED(CONFIG_DEBUG_PIRQ)) + verify_copy_pirq_routing_table(addr, routing_table); + if (IS_ENABLED(CONFIG_PIRQ_ROUTE)) + pirq_route_irqs(addr); + return addr + routing_table->size; } diff --git a/src/arch/x86/romcc_console.c b/src/arch/x86/romcc_console.c index fa706d00c6..f5c8b9bc92 100644 --- a/src/arch/x86/romcc_console.c +++ b/src/arch/x86/romcc_console.c @@ -19,40 +19,40 @@ #include <commonlib/loglevel.h> /* Include the sources. */ -#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO +#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) && IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) #include "drivers/uart/util.c" #include "drivers/uart/uart8250io.c" #endif -#if CONFIG_CONSOLE_NE2K +#if IS_ENABLED(CONFIG_CONSOLE_NE2K) #include "drivers/net/ne2k.c" #endif void console_hw_init(void) { -#if CONFIG_CONSOLE_SERIAL +#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) uart_init(CONFIG_UART_FOR_CONSOLE); #endif -#if CONFIG_CONSOLE_NE2K +#if IS_ENABLED(CONFIG_CONSOLE_NE2K) ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT); #endif } void console_tx_byte(unsigned char byte) { -#if CONFIG_CONSOLE_SERIAL +#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) uart_tx_byte(CONFIG_UART_FOR_CONSOLE, byte); #endif -#if CONFIG_CONSOLE_NE2K +#if IS_ENABLED(CONFIG_CONSOLE_NE2K) ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); #endif } void console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL +#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) uart_tx_flush(CONFIG_UART_FOR_CONSOLE); #endif -#if CONFIG_CONSOLE_NE2K +#if IS_ENABLED(CONFIG_CONSOLE_NE2K) ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); #endif } diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 79279faa79..285027006e 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -29,7 +29,7 @@ #include <memory_info.h> #include <spd.h> #include <cbmem.h> -#if CONFIG_CHROMEOS +#if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/gnvs.h> #endif @@ -309,22 +309,22 @@ static int smbios_write_type0(unsigned long *current, int handle) t->system_bios_major_release = 4; t->bios_characteristics = BIOS_CHARACTERISTICS_PCI_SUPPORTED | -#if CONFIG_CARDBUS_PLUGIN_SUPPORT - BIOS_CHARACTERISTICS_PC_CARD | -#endif BIOS_CHARACTERISTICS_SELECTABLE_BOOT | BIOS_CHARACTERISTICS_UPGRADEABLE; -#if CONFIG_HAVE_ACPI_TABLES - t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI; -#endif + if (IS_ENABLED(CONFIG_CARDBUS_PLUGIN_SUPPORT)) + t->bios_characteristics |= BIOS_CHARACTERISTICS_PC_CARD; + + if (IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)) + t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI; + t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET; len = t->length + smbios_string_table_len(t->eos); *current += len; return len; } -#if !CONFIG_SMBIOS_PROVIDED_BY_MOBO +#if !IS_ENABLED(CONFIG_SMBIOS_PROVIDED_BY_MOBO) const char *__attribute__((weak)) smbios_mainboard_serial_number(void) { @@ -623,10 +623,9 @@ unsigned long smbios_write_tables(unsigned long current) handle++)); update_max(len, max_struct_size, smbios_write_type11(¤t, &handle)); -#if CONFIG_ELOG - update_max(len, max_struct_size, elog_smbios_write_type15(¤t, - handle++)); -#endif + if (IS_ENABLED(CONFIG_ELOG)) + update_max(len, max_struct_size, + elog_smbios_write_type15(¤t,handle++)); update_max(len, max_struct_size, smbios_write_type17(¤t, &handle)); update_max(len, max_struct_size, smbios_write_type32(¤t, |