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authorArthur Heymans <arthur@aheymans.xyz>2018-01-06 18:40:23 +0100
committerMartin Roth <martinroth@google.com>2018-01-17 17:09:13 +0000
commit0a4e0fd913006de8f5d0a4ea24e013f30243cf5c (patch)
tree47d8e59bd239a7b6b74d25393f9e3efe6cf1e223 /src/arch/x86
parent30bba281b9b4330f5fadf36d187c2512f94c29e0 (diff)
downloadcoreboot-0a4e0fd913006de8f5d0a4ea24e013f30243cf5c.tar.xz
cpu/intel/speedstep: Fix the PNOT ACPI method
The PNOT method never notifies the CPU to update it's _CST methods due to reliance on inexisting variable (PDCx). Add a method in the speedstep ssdt generator to notify all available CPU nodes and hook this up in this file. The cpu.asl file is moved to cpu/intel/speedstep/acpi since it now relies on code generated in the speedstep ssdt generator. CPUs not using the speedstep code never included this PNOT method so this is a logical place for this code to be. Change-Id: Ie2ba5e07b401d6f7c80c31f2bfcd9ef3ac0c1ad1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/include/arch/acpigen.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index 9ec6ee1bf3..a50a9004f6 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -82,6 +82,7 @@ enum {
AND_OP = 0x7B,
OR_OP = 0x7D,
NOT_OP = 0x80,
+ NOTIFY_OP = 0x86,
LEQUAL_OP = 0x93,
LGREATER_OP = 0x94,
LLESS_OP = 0x95,