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authorStefan Reinauer <reinauer@chromium.org>2013-05-29 13:10:56 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 21:47:27 +0200
commit37332b66fa1911144dc2c7cd0bda77f7dbbcfb3b (patch)
tree7e28fa5c7ec27b419197bd188bc38a7b04641c49 /src/arch/x86
parent2d8112523aa04bca3f4d56d6ba1660082bf279b5 (diff)
downloadcoreboot-37332b66fa1911144dc2c7cd0bda77f7dbbcfb3b.tar.xz
arch: clean up Kconfig and Makefile
remove some unused code Change-Id: I41602fb391c1910c588a4f9dcc7c2edefe8ab5bc Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3669 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Kconfig12
-rw-r--r--src/arch/x86/lib/Makefile.inc1
2 files changed, 0 insertions, 13 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 69cdc8a5a4..95fc172695 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -103,14 +103,6 @@ config HAVE_ARCH_MEMCPY
bool
default y
-config BIG_ENDIAN
- bool
- default n
-
-config LITTLE_ENDIAN
- bool
- default !BIG_ENDIAN
-
config IOAPIC_INTERRUPTS_ON_FSB
bool
default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
@@ -119,10 +111,6 @@ config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
bool
default n
-config PCI_CONF2
- bool
- default n
-
config HPET_ADDRESS
hex
default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc
index 7cdd3c64dd..56e4171578 100644
--- a/src/arch/x86/lib/Makefile.inc
+++ b/src/arch/x86/lib/Makefile.inc
@@ -1,7 +1,6 @@
ramstage-y += c_start.S
ramstage-y += cpu.c
ramstage-y += pci_ops_conf1.c
-ramstage-$(CONFIG_PCI_CONF2) += pci_ops_conf2.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-y += exception.c
ramstage-$(CONFIG_IOAPIC) += ioapic.c