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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-01-18 23:28:52 +0100 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-01-20 14:39:00 +0100 |
| commit | c6daaa7497489c578263cc057b2903c04000b01e (patch) | |
| tree | 85d91202d20bf2608858aa1da4173ba23b647ab1 /src/arch/x86 | |
| parent | 938ae3ed18ac72878e572e4cdc2ff5029fe97d74 (diff) | |
| download | coreboot-c6daaa7497489c578263cc057b2903c04000b01e.tar.xz | |
Leave SSE and MMX instructions enabled in coreboot
In order to use SSE+MMX optimized payloads we don't want to disable SSE+MMX
instructions in the CPU after romstage.
Change-Id: I51aeb01f04492ad7bc8b1fe181a4ae17fe0ca61e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/553
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/arch/x86')
| -rwxr-xr-x | src/arch/x86/Makefile.inc | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 54f0f82da5..cbe38dd56d 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -204,13 +204,6 @@ endif crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -ifeq ($(CONFIG_SSE),y) -crt0s += $(src)/cpu/x86/sse_disable.inc -endif -ifeq ($(CONFIG_MMX),y) -crt0s += $(src)/cpu/x86/mmx_disable.inc -endif - ifeq ($(CONFIG_ROMCC),y) crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc endif |