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authorAaron Durbin <adurbin@chromium.org>2018-09-13 02:10:45 -0600
committerAaron Durbin <adurbin@chromium.org>2018-09-14 08:16:37 +0000
commit75a62e76486f63f6dadb5492c205570ace81e9d5 (patch)
treec3338d2ddd7b2f9f51f35432a24087fc289999fb /src/arch/x86
parentcf9ea55473cde8b9a2b9494eca452df7783376e5 (diff)
downloadcoreboot-75a62e76486f63f6dadb5492c205570ace81e9d5.tar.xz
complier.h: add __always_inline and use it in code base
Add a __always_inline macro that wraps __attribute__((always_inline)) and replace current users with the macro, excluding files under src/vendorcode. Change-Id: Ic57e474c1d2ca7cc0405ac677869f78a28d3e529 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/28587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@google.com>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/include/arch/cpu.h1
-rw-r--r--src/arch/x86/include/arch/hlt.h4
-rw-r--r--src/arch/x86/include/arch/io.h47
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h15
-rw-r--r--src/arch/x86/include/arch/pci_mmio_cfg.h13
-rw-r--r--src/arch/x86/include/arch/smp/atomic.h6
-rw-r--r--src/arch/x86/include/arch/smp/spinlock.h8
7 files changed, 51 insertions, 43 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 5f11c9dc0c..99d10004db 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -242,7 +242,6 @@ static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms)
#endif
#define asmlinkage __attribute__((regparm(0)))
-#define alwaysinline inline __attribute__((always_inline))
#ifndef __ROMCC__
/*
diff --git a/src/arch/x86/include/arch/hlt.h b/src/arch/x86/include/arch/hlt.h
index 0394ce830d..cf7176ae90 100644
--- a/src/arch/x86/include/arch/hlt.h
+++ b/src/arch/x86/include/arch/hlt.h
@@ -20,7 +20,9 @@ static void hlt(void)
__builtin_hlt();
}
#else
-static inline __attribute__((always_inline)) void hlt(void)
+#include <compiler.h>
+
+static __always_inline void hlt(void)
{
asm("hlt");
}
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 37b2e957fe..64b5f120e0 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -14,6 +14,7 @@
#ifndef _ASM_IO_H
#define _ASM_IO_H
+#include <compiler.h>
#include <endian.h>
#include <stdint.h>
#include <rules.h>
@@ -156,52 +157,52 @@ static inline void insl(uint16_t port, void *addr, unsigned long count)
);
}
-static inline __attribute__((always_inline)) uint8_t read8(
+static __always_inline uint8_t read8(
const volatile void *addr)
{
return *((volatile uint8_t *)(addr));
}
-static inline __attribute__((always_inline)) uint16_t read16(
+static __always_inline uint16_t read16(
const volatile void *addr)
{
return *((volatile uint16_t *)(addr));
}
-static inline __attribute__((always_inline)) uint32_t read32(
+static __always_inline uint32_t read32(
const volatile void *addr)
{
return *((volatile uint32_t *)(addr));
}
#ifndef __ROMCC__
-static inline __attribute__((always_inline)) uint64_t read64(
+static __always_inline uint64_t read64(
const volatile void *addr)
{
return *((volatile uint64_t *)(addr));
}
#endif
-static inline __attribute__((always_inline)) void write8(volatile void *addr,
+static __always_inline void write8(volatile void *addr,
uint8_t value)
{
*((volatile uint8_t *)(addr)) = value;
}
-static inline __attribute__((always_inline)) void write16(volatile void *addr,
+static __always_inline void write16(volatile void *addr,
uint16_t value)
{
*((volatile uint16_t *)(addr)) = value;
}
-static inline __attribute__((always_inline)) void write32(volatile void *addr,
+static __always_inline void write32(volatile void *addr,
uint32_t value)
{
*((volatile uint32_t *)(addr)) = value;
}
#ifndef __ROMCC__
-static inline __attribute__((always_inline)) void write64(volatile void *addr,
+static __always_inline void write64(volatile void *addr,
uint64_t value)
{
*((volatile uint64_t *)(addr)) = value;
@@ -268,7 +269,7 @@ typedef u32 device_t;
#include <arch/pci_io_cfg.h>
#include <arch/pci_mmio_cfg.h>
-static inline __attribute__((always_inline))
+static __always_inline
uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -277,7 +278,7 @@ uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
return pci_io_read_config8(dev, where);
}
-static inline __attribute__((always_inline))
+static __always_inline
uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -286,7 +287,7 @@ uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where)
return pci_io_read_config16(dev, where);
}
-static inline __attribute__((always_inline))
+static __always_inline
uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -295,7 +296,7 @@ uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where)
return pci_io_read_config32(dev, where);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -304,7 +305,7 @@ void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
pci_io_write_config8(dev, where, value);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -313,7 +314,7 @@ void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
pci_io_write_config16(dev, where, value);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value)
{
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
@@ -365,7 +366,7 @@ static inline pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id,
}
/* Generic functions for pnp devices */
-static inline __attribute__((always_inline)) void pnp_write_config(
+static __always_inline void pnp_write_config(
pnp_devfn_t dev, uint8_t reg, uint8_t value)
{
unsigned int port = dev >> 8;
@@ -373,7 +374,7 @@ static inline __attribute__((always_inline)) void pnp_write_config(
outb(value, port + 1);
}
-static inline __attribute__((always_inline)) uint8_t pnp_read_config(
+static __always_inline uint8_t pnp_read_config(
pnp_devfn_t dev, uint8_t reg)
{
unsigned int port = dev >> 8;
@@ -381,46 +382,46 @@ static inline __attribute__((always_inline)) uint8_t pnp_read_config(
return inb(port + 1);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pnp_set_logical_device(pnp_devfn_t dev)
{
unsigned int device = dev & 0xff;
pnp_write_config(dev, 0x07, device);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pnp_set_enable(pnp_devfn_t dev, int enable)
{
pnp_write_config(dev, 0x30, enable?0x1:0x0);
}
-static inline __attribute__((always_inline))
+static __always_inline
int pnp_read_enable(pnp_devfn_t dev)
{
return !!pnp_read_config(dev, 0x30);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pnp_set_iobase(pnp_devfn_t dev, unsigned int index, unsigned int iobase)
{
pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
pnp_write_config(dev, index + 1, iobase & 0xff);
}
-static inline __attribute__((always_inline))
+static __always_inline
uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned int index)
{
return ((uint16_t)(pnp_read_config(dev, index)) << 8)
| pnp_read_config(dev, index + 1);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pnp_set_irq(pnp_devfn_t dev, unsigned int index, unsigned int irq)
{
pnp_write_config(dev, index, irq);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
{
pnp_write_config(dev, index, drq & 0xff);
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index a09b488032..15d1a132cf 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -14,9 +14,10 @@
#ifndef _PCI_IO_CFG_H
#define _PCI_IO_CFG_H
+#include <compiler.h>
#include <arch/io.h>
-static inline __attribute__((always_inline))
+static __always_inline
unsigned int pci_io_encode_addr(pci_devfn_t dev, unsigned int where)
{
if (IS_ENABLED(CONFIG_PCI_IO_CFG_EXT)) {
@@ -27,7 +28,7 @@ unsigned int pci_io_encode_addr(pci_devfn_t dev, unsigned int where)
}
}
-static inline __attribute__((always_inline))
+static __always_inline
uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned int where)
{
unsigned int addr = pci_io_encode_addr(dev, where);
@@ -35,7 +36,7 @@ uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned int where)
return inb(0xCFC + (addr & 3));
}
-static inline __attribute__((always_inline))
+static __always_inline
uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned int where)
{
unsigned int addr = pci_io_encode_addr(dev, where);
@@ -43,7 +44,7 @@ uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned int where)
return inw(0xCFC + (addr & 2));
}
-static inline __attribute__((always_inline))
+static __always_inline
uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned int where)
{
unsigned int addr = pci_io_encode_addr(dev, where);
@@ -51,7 +52,7 @@ uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned int where)
return inl(0xCFC);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_io_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
{
unsigned int addr = pci_io_encode_addr(dev, where);
@@ -59,7 +60,7 @@ void pci_io_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
outb(value, 0xCFC + (addr & 3));
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_io_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
{
unsigned int addr = pci_io_encode_addr(dev, where);
@@ -67,7 +68,7 @@ void pci_io_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
outw(value, 0xCFC + (addr & 2));
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_io_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value)
{
unsigned int addr = pci_io_encode_addr(dev, where);
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index efd8269ad2..a5ca574466 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -17,10 +17,11 @@
#define _PCI_MMIO_CFG_H
#include <arch/io.h>
+#include <compiler.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
-static inline __attribute__((always_inline))
+static __always_inline
u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
{
void *addr;
@@ -28,7 +29,7 @@ u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
return read8(addr);
}
-static inline __attribute__((always_inline))
+static __always_inline
u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
{
void *addr;
@@ -36,7 +37,7 @@ u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
return read16(addr);
}
-static inline __attribute__((always_inline))
+static __always_inline
u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
{
void *addr;
@@ -44,7 +45,7 @@ u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
return read32(addr);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
{
void *addr;
@@ -52,7 +53,7 @@ void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
write8(addr, value);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
{
void *addr;
@@ -60,7 +61,7 @@ void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
write16(addr, value);
}
-static inline __attribute__((always_inline))
+static __always_inline
void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
{
void *addr;
diff --git a/src/arch/x86/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h
index 1ca165edae..b12da12e54 100644
--- a/src/arch/x86/include/arch/smp/atomic.h
+++ b/src/arch/x86/include/arch/smp/atomic.h
@@ -14,6 +14,8 @@
#ifndef ARCH_SMP_ATOMIC_H
#define ARCH_SMP_ATOMIC_H
+#include <compiler.h>
+
/*
* Make sure gcc doesn't try to be clever and move things around
* on us. We need to use _exactly_ the address the user gave us,
@@ -55,7 +57,7 @@ typedef struct { volatile int counter; } atomic_t;
* Atomically increments v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-static inline __attribute__((always_inline)) void atomic_inc(atomic_t *v)
+static __always_inline void atomic_inc(atomic_t *v)
{
__asm__ __volatile__(
"lock ; incl %0"
@@ -70,7 +72,7 @@ static inline __attribute__((always_inline)) void atomic_inc(atomic_t *v)
* Atomically decrements v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
-static inline __attribute__((always_inline)) void atomic_dec(atomic_t *v)
+static __always_inline void atomic_dec(atomic_t *v)
{
__asm__ __volatile__(
"lock ; decl %0"
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 1c1def1252..212cd8cd64 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -14,6 +14,8 @@
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
+#include <compiler.h>
+
#if !defined(__PRE_RAM__) \
|| IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \
|| IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \
@@ -73,14 +75,14 @@ void initialize_romstage_microcode_cbfs_lock(void);
#define spin_unlock_string \
"movb $1,%0"
-static inline __attribute__((always_inline)) void spin_lock(spinlock_t *lock)
+static __always_inline void spin_lock(spinlock_t *lock)
{
__asm__ __volatile__(
spin_lock_string
: "=m" (lock->lock) : : "memory");
}
-static inline __attribute__((always_inline)) void spin_unlock(spinlock_t *lock)
+static __always_inline void spin_unlock(spinlock_t *lock)
{
__asm__ __volatile__(
spin_unlock_string
@@ -88,7 +90,7 @@ static inline __attribute__((always_inline)) void spin_unlock(spinlock_t *lock)
}
/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
-static inline __attribute__((always_inline)) void cpu_relax(void)
+static __always_inline void cpu_relax(void)
{
__asm__ __volatile__("rep;nop" : : : "memory");
}