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| author | Harsha Priya <harhapriya.n@intel.com> | 2018-04-25 13:57:55 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-05-08 03:04:50 +0000 |
| commit | a850717dc7e3aaacbf3f85247d868ab198ad0a14 (patch) | |
| tree | 279c2f22486b1242d590398390adec044639c268 /src/arch/x86 | |
| parent | f9de5a4b43f26fc892c1397a900e4c64a6715736 (diff) | |
| download | coreboot-a850717dc7e3aaacbf3f85247d868ab198ad0a14.tar.xz | |
arch/x86/acpi_device: Add macros to define gpio with wake flag
This patch adds new macros to define gpio with an option to either
enable irq wake (mark it as ExclusiveAndWake flag in SSDT) or disable
it (mark it as just Exclusive flag in SSDT).
Change-Id: Ia71559dcae65112b75e4c789328e4a6153e922b0
Signed-off-by: Harsha Priya <harshapriya.n@intel.com>
Reviewed-on: https://review.coreboot.org/25838
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/include/arch/acpi_device.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 33f3f8687d..31b97bc09f 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -242,6 +242,36 @@ struct acpi_gpio { .pin_count = 1, \ .pins = { (gpio) } } +/* Edge Triggered Active High GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_EDGE_HIGH_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_EDGE_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Edge Triggered Active Low GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_EDGE_LOW_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_EDGE_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Edge Triggered Active Both GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_EDGE_BOTH_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_EDGE_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_BOTH, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + /* Level Triggered Active High GPIO interrupt */ #define ACPI_GPIO_IRQ_LEVEL_HIGH(gpio) { \ .type = ACPI_GPIO_TYPE_INTERRUPT, \ |