summaryrefslogtreecommitdiff
path: root/src/arch/x86
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-17 20:51:08 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-26 21:08:41 +0000
commitcd7a70f4879ff6e0f3e334ddf1031ccf0c0d31cf (patch)
treeb0438431df0943ab5f0fa9d80a99fc265130ac23 /src/arch/x86
parent16248e89ecf73a76e5d9e9e2de46146f7ffece88 (diff)
downloadcoreboot-cd7a70f4879ff6e0f3e334ddf1031ccf0c0d31cf.tar.xz
soc/intel: Use common romstage code
This provides stack guards with checking and common entry into postcar. The code in cpu/intel/car/romstage.c is candidate for becoming architectural so function prototype is moved to <arch/romstage.h>. Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/include/arch/romstage.h16
-rw-r--r--src/arch/x86/postcar_loader.c15
2 files changed, 31 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h
index 42c9fbb6cd..7816a7c0bc 100644
--- a/src/arch/x86/include/arch/romstage.h
+++ b/src/arch/x86/include/arch/romstage.h
@@ -18,6 +18,8 @@
#include <stddef.h>
#include <stdint.h>
+void mainboard_romstage_entry(void);
+
/*
* Support setting up a stack frame consisting of MTRR information
* for use in bootstrapping the caching attributes after cache-as-ram
@@ -62,6 +64,20 @@ void postcar_frame_common_mtrrs(struct postcar_frame *pcf);
void *postcar_commit_mtrrs(struct postcar_frame *pcf);
/*
+ * fill_postcar_frame() is called after raminit completes and right before
+ * calling run_postcar_phase(). Implementation should call postcar_frame_add_mtrr()
+ * to tag memory ranges as cacheable to speed up execution of postcar and
+ * early ramstage.
+ */
+void fill_postcar_frame(struct postcar_frame *pcf);
+
+/*
+ * prepare_and_run_postcar() determines the stack to use after
+ * cache-as-ram is torn down as well as the MTRR settings to use.
+ */
+void prepare_and_run_postcar(struct postcar_frame *pcf);
+
+/*
* Load and run a program that takes control of execution that
* tears down CAR and loads ramstage. The postcar_frame object
* indicates how to set up the frame. If caching is enabled at
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index 816f41e412..4a7d549347 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -132,6 +132,21 @@ void postcar_frame_common_mtrrs(struct postcar_frame *pcf)
postcar_frame_add_romcache(pcf, MTRR_TYPE_WRPROT);
}
+/* prepare_and_run_postcar() determines the stack to use after
+ * cache-as-ram is torn down as well as the MTRR settings to use. */
+void prepare_and_run_postcar(struct postcar_frame *pcf)
+{
+ if (postcar_frame_init(pcf, 0))
+ die("Unable to initialize postcar frame.\n");
+
+ fill_postcar_frame(pcf);
+
+ postcar_frame_common_mtrrs(pcf);
+
+ run_postcar_phase(pcf);
+ /* We do not return here. */
+}
+
void *postcar_commit_mtrrs(struct postcar_frame *pcf)
{
/*