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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 15:51:51 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-21 09:28:41 +0000 |
| commit | de56a66e73442d1fb132f466bb556563bee0639d (patch) | |
| tree | 2bd7f4263f2de87eae1ea1986f7d1e4b41649247 /src/arch/x86 | |
| parent | eef63607b846fbbd94104f3b5e8f1d857d8f4741 (diff) | |
| download | coreboot-de56a66e73442d1fb132f466bb556563bee0639d.tar.xz | |
cpu/amd/fam10: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.
Change-Id: I3c69f158a5667783292161815f9ae61195b5e03b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36963
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 3 | ||||
| -rw-r--r-- | src/arch/x86/smbios.c | 10 |
2 files changed, 1 insertions, 12 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index d74d6de7b5..e0e3ca1972 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -210,8 +210,7 @@ int cpu_have_cpuid(void); static inline bool cpu_is_amd(void) { - return CONFIG(CPU_AMD_AGESA) || CONFIG(CPU_AMD_PI) - || CONFIG(SOC_AMD_COMMON) || CONFIG(CPU_AMD_MODEL_10XXX); + return CONFIG(CPU_AMD_AGESA) || CONFIG(CPU_AMD_PI) || CONFIG(SOC_AMD_COMMON); } static inline bool cpu_is_intel(void) diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 725d808d56..7e05408242 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -545,16 +545,6 @@ static int get_socket_type(void) return 0x13; if (CONFIG(CPU_INTEL_SOCKET_LGA775)) return 0x15; - if (CONFIG(CPU_AMD_SOCKET_AM2R2)) - return 0x17; - if (CONFIG(CPU_AMD_SOCKET_F_1207)) - return 0x18; - if (CONFIG(CPU_AMD_SOCKET_G34_NON_AGESA)) - return 0x1a; - if (CONFIG(CPU_AMD_SOCKET_AM3)) - return 0x1b; - if (CONFIG(CPU_AMD_SOCKET_C32_NON_AGESA)) - return 0x1c; return 0x02; /* Unknown */ } |