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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-11 20:34:26 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 15:19:06 +0000 |
| commit | 34cf5619f929775efd819468ba6036e637cfbd85 (patch) | |
| tree | e6763075a5e36710977ae51fcfd4a67b9bf3fffe /src/arch/x86 | |
| parent | 74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d (diff) | |
| download | coreboot-34cf5619f929775efd819468ba6036e637cfbd85.tar.xz | |
device/pci_ops: Reuse romstage PCI config for ramstage
By changing the signatures we do not need to define
PCI config accessors separately for ramstage.
Change-Id: I9364cb34fe8127972c772516a0a0b1d281c5ed00
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/pci_ops_conf1.c | 64 |
1 files changed, 8 insertions, 56 deletions
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 4e2f24e3dd..03c2b64183 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -14,65 +14,17 @@ #include <arch/io.h> #include <device/pci.h> #include <device/pci_ops.h> +#include <arch/pci_io_cfg.h> + /* * Functions for accessing PCI configuration space with type 1 accesses */ -#if !CONFIG(PCI_IO_CFG_EXT) -#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | (reg & ~3)) -#else -#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | ((reg & 0xff) & ~3) |\ - ((reg & 0xf00)<<16)) -#endif - -static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inb(0xCFC + (reg & 3)); -} - -static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inw(0xCFC + (reg & 2)); -} - -static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inl(0xCFC); -} - -static void pci_conf1_write_config8(const struct device *dev, uint16_t reg, - uint8_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outb(value, 0xCFC + (reg & 3)); -} - -static void pci_conf1_write_config16(const struct device *dev, uint16_t reg, - uint16_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outw(value, 0xCFC + (reg & 2)); -} - -static void pci_conf1_write_config32(const struct device *dev, uint16_t reg, - uint32_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outl(value, 0xCFC); -} - -#undef CONF_CMD - const struct pci_bus_operations pci_cf8_conf1 = { - .read8 = pci_conf1_read_config8, - .read16 = pci_conf1_read_config16, - .read32 = pci_conf1_read_config32, - .write8 = pci_conf1_write_config8, - .write16 = pci_conf1_write_config16, - .write32 = pci_conf1_write_config32, + .read8 = pci_io_read_config8, + .read16 = pci_io_read_config16, + .read32 = pci_io_read_config32, + .write8 = pci_io_write_config8, + .write16 = pci_io_write_config16, + .write32 = pci_io_write_config32, }; |