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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-11 20:33:01 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-13 04:42:05 +0000
commitb603fdc462871cea7224d3489ceb1e83fbb12e74 (patch)
treed1f58bccaa725408f703a2c2683ea29372bca64b /src/arch/x86
parent5517246a0d254b3628ee435ac00b47eaefa569f6 (diff)
downloadcoreboot-b603fdc462871cea7224d3489ceb1e83fbb12e74.tar.xz
device/pci_ops: Rename 'where' to 'reg'
One could understand 'where' as bus, device, function or register. Make it clear it is register. Change-Id: I95d0330ba40510e48be70ca1d8f58aca66c8f695 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h54
-rw-r--r--src/arch/x86/pci_ops_conf1.c42
2 files changed, 48 insertions, 48 deletions
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index 45ca381d09..317c50a3fc 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -19,60 +19,60 @@
#include <device/pci_type.h>
static __always_inline
-uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t where)
+uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg)
{
if (CONFIG(PCI_IO_CFG_EXT)) {
// seg == 0
- return dev >> 4 | (where & 0xff) | ((where & 0xf00) << 16);
+ return dev >> 4 | (reg & 0xff) | ((reg & 0xf00) << 16);
} else {
- return dev >> 4 | where;
+ return dev >> 4 | reg;
}
}
static __always_inline
-uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t where)
+uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inb(0xCFC + (addr & 3));
}
static __always_inline
-uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t where)
+uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inw(0xCFC + (addr & 2));
}
static __always_inline
-uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t where)
+uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
return inl(0xCFC);
}
static __always_inline
-void pci_io_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
+void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outb(value, 0xCFC + (addr & 3));
}
static __always_inline
-void pci_io_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
+void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outw(value, 0xCFC + (addr & 2));
}
static __always_inline
-void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
+void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
- uint32_t addr = pci_io_encode_addr(dev, where);
+ uint32_t addr = pci_io_encode_addr(dev, reg);
outl(0x80000000 | (addr & ~3), 0xCF8);
outl(value, 0xCFC);
}
@@ -85,39 +85,39 @@ void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
*/
static __always_inline
-uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where)
+uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
{
- return pci_io_read_config8(dev, where);
+ return pci_io_read_config8(dev, reg);
}
static __always_inline
-uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where)
+uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
{
- return pci_io_read_config16(dev, where);
+ return pci_io_read_config16(dev, reg);
}
static __always_inline
-uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where)
+uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
{
- return pci_io_read_config32(dev, where);
+ return pci_io_read_config32(dev, reg);
}
static __always_inline
-void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value)
+void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
- pci_io_write_config8(dev, where, value);
+ pci_io_write_config8(dev, reg, value);
}
static __always_inline
-void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value)
+void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
- pci_io_write_config16(dev, where, value);
+ pci_io_write_config16(dev, reg, value);
}
static __always_inline
-void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value)
+void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
- pci_io_write_config32(dev, where, value);
+ pci_io_write_config32(dev, reg, value);
}
#endif
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c
index 3cd1ed5f18..4e2f24e3dd 100644
--- a/src/arch/x86/pci_ops_conf1.c
+++ b/src/arch/x86/pci_ops_conf1.c
@@ -19,50 +19,50 @@
*/
#if !CONFIG(PCI_IO_CFG_EXT)
-#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \
- ((dev)->path.pci.devfn << 8) | (where & ~3))
+#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \
+ ((dev)->path.pci.devfn << 8) | (reg & ~3))
#else
-#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \
- ((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\
- ((where & 0xf00)<<16))
+#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \
+ ((dev)->path.pci.devfn << 8) | ((reg & 0xff) & ~3) |\
+ ((reg & 0xf00)<<16))
#endif
-static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t where)
+static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t reg)
{
- outl(CONF_CMD(dev, where), 0xCF8);
- return inb(0xCFC + (where & 3));
+ outl(CONF_CMD(dev, reg), 0xCF8);
+ return inb(0xCFC + (reg & 3));
}
-static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t where)
+static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t reg)
{
- outl(CONF_CMD(dev, where), 0xCF8);
- return inw(0xCFC + (where & 2));
+ outl(CONF_CMD(dev, reg), 0xCF8);
+ return inw(0xCFC + (reg & 2));
}
-static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t where)
+static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t reg)
{
- outl(CONF_CMD(dev, where), 0xCF8);
+ outl(CONF_CMD(dev, reg), 0xCF8);
return inl(0xCFC);
}
-static void pci_conf1_write_config8(const struct device *dev, uint16_t where,
+static void pci_conf1_write_config8(const struct device *dev, uint16_t reg,
uint8_t value)
{
- outl(CONF_CMD(dev, where), 0xCF8);
- outb(value, 0xCFC + (where & 3));
+ outl(CONF_CMD(dev, reg), 0xCF8);
+ outb(value, 0xCFC + (reg & 3));
}
-static void pci_conf1_write_config16(const struct device *dev, uint16_t where,
+static void pci_conf1_write_config16(const struct device *dev, uint16_t reg,
uint16_t value)
{
- outl(CONF_CMD(dev, where), 0xCF8);
- outw(value, 0xCFC + (where & 2));
+ outl(CONF_CMD(dev, reg), 0xCF8);
+ outw(value, 0xCFC + (reg & 2));
}
-static void pci_conf1_write_config32(const struct device *dev, uint16_t where,
+static void pci_conf1_write_config32(const struct device *dev, uint16_t reg,
uint32_t value)
{
- outl(CONF_CMD(dev, where), 0xCF8);
+ outl(CONF_CMD(dev, reg), 0xCF8);
outl(value, 0xCFC);
}