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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-04 11:58:50 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-14 18:08:49 +0000 |
| commit | 10bc806ab33e1ce98223913975f307092e621c56 (patch) | |
| tree | 4feb98b6b11cc8f1741ca74757614901aedb1ab8 /src/arch | |
| parent | 40f539f8c4560599f6debd5b6632bb950c224377 (diff) | |
| download | coreboot-10bc806ab33e1ce98223913975f307092e621c56.tar.xz | |
console/post: Split parts to arch/
Both IO port and cmos are currently arch/x86 only features.
Change-Id: I010af3f645c0be38dd856657874c36103aebbdc2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38187
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/x86/post.c | 26 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6ed93e5182..534f2ce20d 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -99,6 +99,7 @@ all-y += boot.c all-y += memcpy.c all-y += memset.c all-y += cpu_common.c +all-y += post.c endif diff --git a/src/arch/x86/post.c b/src/arch/x86/post.c new file mode 100644 index 0000000000..0a20babae1 --- /dev/null +++ b/src/arch/x86/post.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <console/console.h> +#include <arch/io.h> + +void arch_post_code(uint8_t value) +{ + if (CONFIG(POST_IO)) + outb(value, CONFIG_POST_IO_PORT); + + if (CONFIG(CMOS_POST)) + cmos_post_code(value); +} |