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authorEric Biederman <ebiederm@xmission.com>2004-10-14 22:29:26 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-14 22:29:26 +0000
commit3614eebc1380cd2d7e2c74b4274238ace9cca7fc (patch)
tree0788d453362e44cd2db5e9aabcd34b03690643b0 /src/arch
parent1944680bfd0a8ff6ec8df06d142ab143806e92f9 (diff)
downloadcoreboot-3614eebc1380cd2d7e2c74b4274238ace9cca7fc.tar.xz
- Update so we no longer require console.inc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/init/crt0.S.lb62
1 files changed, 55 insertions, 7 deletions
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index 700b01148a..4d9face092 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -23,10 +23,8 @@
#include <arch/asm.h>
#include <arch/intel.h>
+#include <console/loglevel.h>
-#if CONFIG_SMP==1
-#include <cpu/p6/apic.h>
-#endif
/*
* This is the entry code the code in .reset section
* jumps to this address.
@@ -43,7 +41,8 @@
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- CONSOLE_DEBUG_TX_STRING($str_copying_to_ram)
+ mov $str_copying_to_ram, %ebx
+ CALLSP(console_tx_string)
/*
* Copy data into RAM and clear the BSS. Since these segments
@@ -53,7 +52,7 @@ __main:
intel_chip_post_macro(0x11) /* post 11 */
cld /* clear direction flag */
-
+
/* copy linuxBIOS from it's initial load location to
* the location it is compiled to run at.
* Normally this is copying from FLASH ROM to RAM.
@@ -149,8 +148,9 @@ decompr_end_n2b:
movl %esp, %ebp
#endif
-
- CONSOLE_DEBUG_TX_STRING($str_pre_main)
+
+ mov $str_pre_main, %ebx
+ CALLSP(console_tx_string)
leal _iseg, %edi
jmp %edi
@@ -159,7 +159,55 @@ decompr_end_n2b:
hlt
jmp .Lhlt
+
+ /* Uses esp, ebx, ax, dx */
+console_tx_string:
+#if ASM_CONSOLE_LOGLEVEL <= BIOS_DEBUG
+ RETSP
+#else
+ mov (%ebx), %al
+ inc %ebx
+ cmp $0, %al
+ jne 9f
+ RETSP
+9:
+/* Base Address */
+#ifndef TTYS0_BASE
+#define TTYS0_BASE 0x3f8
+#endif
+/* Data */
+#define TTYS0_RBR (TTYS0_BASE+0x00)
+
+/* Control */
+#define TTYS0_TBR TTYS0_RBR
+#define TTYS0_IER (TTYS0_BASE+0x01)
+#define TTYS0_IIR (TTYS0_BASE+0x02)
+#define TTYS0_FCR TTYS0_IIR
+#define TTYS0_LCR (TTYS0_BASE+0x03)
+#define TTYS0_MCR (TTYS0_BASE+0x04)
+#define TTYS0_DLL TTYS0_RBR
+#define TTYS0_DLM TTYS0_IER
+
+/* Status */
+#define TTYS0_LSR (TTYS0_BASE+0x05)
+#define TTYS0_MSR (TTYS0_BASE+0x06)
+#define TTYS0_SCR (TTYS0_BASE+0x07)
+
+ mov %al, %ah
+10: mov $TTYS0_LSR, %dx
+ inb %dx, %al
+ test $0x20, %al
+ je 10b
+ mov $TTYS0_TBR, %dx
+ mov %ah, %al
+ outb %al, %dx
+
+ jmp console_tx_string
+
.section ".rom.data"
str_copying_to_ram: .string "Copying LinuxBIOS to ram.\r\n"
str_pre_main: .string "Jumping to LinuxBIOS.\r\n"
.previous
+
+#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
+ \ No newline at end of file