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| author | Julius Werner <jwerner@chromium.org> | 2018-08-03 17:07:51 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2018-08-07 20:55:46 +0000 |
| commit | b47b6e9f2808ab3f6c8eb83e363d99e846f498b9 (patch) | |
| tree | d00952b81362dfbe6ae1d9a3954991313979fe01 /src/arch | |
| parent | 90f025b2762edbac0516cb42f4fc7c9c28f260fa (diff) | |
| download | coreboot-b47b6e9f2808ab3f6c8eb83e363d99e846f498b9.tar.xz | |
arm64: Disable MMU during legacy payload handoff (without Arm TF)
coreboot payloads expect to be entered with MMU disabled on arm64. The
usual path via Arm TF already does this, so let's align the legacy path
(without Secure Monitor) to do the same.
Change-Id: I18717e00c905123d53b27a81185b534ba819c7b3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/27878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/arm64/transition.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/arm64/transition.c b/src/arch/arm64/transition.c index 8c5beb0b4f..c549c5f26e 100644 --- a/src/arch/arm64/transition.c +++ b/src/arch/arm64/transition.c @@ -15,6 +15,7 @@ #include <arch/cache.h> #include <arch/lib_helpers.h> +#include <arch/mmu.h> #include <arch/transition.h> #include <assert.h> #include <compiler.h> @@ -123,7 +124,9 @@ void transition(struct exc_state *exc_state) /* SP_ELx: Initialize stack pointer */ raw_write_sp_elx(elx->sp_elx, elx_el); - isb(); + + /* Payloads expect to be entered with MMU disabled. Includes an ISB. */ + mmu_disable(); /* Eret to the entry point */ trans_switch(regs); |