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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-08-05 10:48:43 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-08-05 10:48:43 +0000
commitf537407e5ae1885a3f434412dd35f5f28f78343f (patch)
treec9a35a6f2733d4f3835411ecfd4dc8d9c33239bb /src/arch
parent8f95edaabd3841c8e5db26d6b372611f70c7b3a6 (diff)
downloadcoreboot-f537407e5ae1885a3f434412dd35f5f28f78343f.tar.xz
Fix the generic code for copying and running coreboot_ram in case
certain configuration options are disabled. The strings were just at the wrong place. Two boards fix up some variables for romstream. This isn't necessary (or possible) when CBFS is active, as there is no romstream. It would be nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any invariant that forces that to be inactive if CBFS is active, and this patch is supposed to be small, esp. as the stream loaders are on the way out. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/init/crt0.S.lb10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index 3865ba3c3f..9e8968510d 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -70,6 +70,7 @@ __main:
* Normally this is copying from FLASH ROM to RAM.
*/
movl %ebp, %esi
+ /* FIXME: look for a proper place for the stack */
movl $0x4000000, %esp
movl %esp, %ebp
pushl %esi
@@ -142,6 +143,11 @@ str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n"
#else
str_copying_to_ram: .string "Copying coreboot to RAM.\r\n"
#endif
+str_pre_main: .string "Jumping to coreboot.\r\n"
+.previous
+
+#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
+
#if CONFIG_CBFS == 1
# if CONFIG_USE_FALLBACK_IMAGE == 1
str_coreboot_ram_name: .string "fallback/coreboot_ram"
@@ -149,9 +155,5 @@ str_coreboot_ram_name: .string "fallback/coreboot_ram"
str_coreboot_ram_name: .string "normal/coreboot_ram"
# endif
#endif
-str_pre_main: .string "Jumping to coreboot.\r\n"
-.previous
-
-#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
#endif /* CONFIG_USE_DCACHE_RAM */