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| author | Furquan Shaikh <furquan@google.com> | 2021-02-03 23:10:22 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-06 09:05:57 +0000 |
| commit | 5f262be24c2ae43451751261ecabdc825a167af0 (patch) | |
| tree | 47edaf4996622cec4a12c4e9a157698e7cb09ff7 /src/arch | |
| parent | 1a5f25ea7f12d76425c6b66b3ff5cca3bb496296 (diff) | |
| download | coreboot-5f262be24c2ae43451751261ecabdc825a167af0.tar.xz | |
intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
This change renames config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
in preparation to allow V1 and V2 versions of MP services PPI.
TEST=Verified that timeless build for brya, volteer, icelake_rvp,
elkhartlake_crb and waddledee shows no change in generated coreboot.rom
Change-Id: I04acf1bc3a3739b31d6e9d01b6aa97542378754f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50275
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/cpu.c | 2 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index d054cfe72c..67a76a1c2c 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -334,7 +334,7 @@ void arch_bootstate_coreboot_exit(void) * function will always getting called from coreboot context * (ESP stack pointer will always refer to coreboot). * - * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * But with MP_SERVICES_PPI implementation in coreboot this * assumption might not be true, where FSP context (stack pointer refers * to FSP) will request to get cpu_index(). * diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index b622465a25..c2cc4ef5c0 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -306,7 +306,7 @@ uint32_t cpu_get_feature_flags_edx(void); * function will always getting called from coreboot context * (ESP stack pointer will always refer to coreboot). * - * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * But with MP_SERVICES_PPI implementation in coreboot this * assumption might not be true, where FSP context (stack pointer refers * to FSP) will request to get cpu_index(). * |