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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-07 06:31:43 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-11 08:33:54 +0000 |
| commit | a48433d39be4002061e8882a9c6a009a497166eb (patch) | |
| tree | cfd77b97ab72014b1a77ee4fb8b2c40e1f325f60 /src/arch | |
| parent | 3e70690f2a5c7c938784e7e42ecef3d0fb3687f9 (diff) | |
| download | coreboot-a48433d39be4002061e8882a9c6a009a497166eb.tar.xz | |
selfboot: Move x86 quirk under arch
Making exceptions for some payload to be loaded near
and under 1 MiB boundary sounds like a legacy 16-bit
x86 BIOS thing we generally do not want under lib/.
Change-Id: I8e8336a03d6f06d8f022c880a8334fe19a777f0a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/boot.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c index 2e1becf0be..d157f96380 100644 --- a/src/arch/x86/boot.c +++ b/src/arch/x86/boot.c @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ +#include <commonlib/helpers.h> #include <console/console.h> #include <arch/stages.h> #include <program_loading.h> @@ -205,6 +206,17 @@ int arch_supports_bounce_buffer(void) return 1; } +int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size) +{ + if (start < 1 * MiB && (start + size) <= 1 * MiB) { + printk(BIOS_DEBUG, + "Payload being loaded at below 1MiB without region being marked as RAM usable.\n"); + return 1; + } + + return 0; +} + static void try_payload(struct prog *prog) { if (prog_type(prog) == PROG_PAYLOAD) { |