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authorMartin Roth <martin@coreboot.org>2018-07-18 12:03:48 -0600
committerMartin Roth <martinroth@google.com>2018-07-18 21:59:52 +0000
commit202e7d4f3c50bfac53d06eaf0b0b1247f4c95be8 (patch)
tree62baac251ea2eafa9ec86fa226dabae3fcb78d91 /src/arch
parenteeb83b6b53fc72fda60dea31fc7e0cf155ccdecf (diff)
downloadcoreboot-202e7d4f3c50bfac53d06eaf0b0b1247f4c95be8.tar.xz
arch/riscv: Fix makefile to only set flags for riscv
This was updating flags for ALL architectures, not just riscv. That was bad, and gave us errors, although they weren't fatal for some reason: i386-elf-gcc: error: missing argument to '-mcmodel=' i386-elf-gcc: error: missing argument to '-march=' i386-elf-gcc: error: missing argument to '-mabi=' This issue started from commit 5fed693a (riscv: add support for modifying compiler options) Add comments to the other 'endif' statements since they're now surrounded by a global ifeq Change-Id: Ifa12ad98b04a5ac36148609ccdf46ca427fc5a27 Signed-off-by: Martin Roth <martin@coreboot.org> Reviewed-on: https://review.coreboot.org/27535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/riscv/Makefile.inc8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 90e4240468..dab661eb8d 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -18,6 +18,7 @@
################################################################################
## RISC-V specific options
################################################################################
+ifeq ($(CONFIG_ARCH_RISCV),y)
ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y)
check-ramstage-overlap-regions += stack
@@ -64,7 +65,7 @@ $(objcbfs)/bootblock.debug: $$(bootblock-objs)
bootblock-c-ccopts += $(riscv_flags)
bootblock-S-ccopts += $(riscv_asm_flags)
-endif
+endif #CONFIG_ARCH_BOOTBLOCK_RISCV
################################################################################
## romstage
@@ -92,7 +93,7 @@ $(objcbfs)/romstage.debug: $$(romstage-objs)
romstage-c-ccopts += $(riscv_flags)
romstage-S-ccopts += $(riscv_asm_flags)
-endif
+endif #CONFIG_ARCH_ROMSTAGE_RISCV
################################################################################
## ramstage
@@ -128,4 +129,5 @@ $(objcbfs)/ramstage.debug: $$(ramstage-objs)
ramstage-c-ccopts += $(riscv_flags)
ramstage-S-ccopts += $(riscv_asm_flags)
-endif
+endif #CONFIG_ARCH_RAMSTAGE_RISCV
+endif #CONFIG_ARCH_RISCV