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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-04 13:31:39 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-11 07:17:14 +0200 |
| commit | c04afd6433cd53acdc727ad760cde9c40090030b (patch) | |
| tree | 1799bca2200a41b843d0d7e67efb2246049ceee5 /src/arch | |
| parent | dcb688e5ec88ac1d168509fa757c4665ef335ad4 (diff) | |
| download | coreboot-c04afd6433cd53acdc727ad760cde9c40090030b.tar.xz | |
CBMEM: Add cbmem_locate_table()
For both romstage and ramstage, this calls an arch-specific function
get_cbmem_table() to resolve the base and size of CBMEM region. In ramstage,
the result is cached as the query may be relatively slow involving multiple PCI
configuration reads.
For x86 CBMEM tables are located right below top of low ram and
have fixed size of HIGH_MEMORY_SIZE in EARLY_CBMEM_INIT implementation.
Change-Id: Ie8d16eb30cd5c3860fff243f36bd4e7d8827a782
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3558
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/armv7/tables.c | 7 | ||||
| -rw-r--r-- | src/arch/x86/boot/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/arch/x86/boot/cbmem.c | 21 |
3 files changed, 30 insertions, 0 deletions
diff --git a/src/arch/armv7/tables.c b/src/arch/armv7/tables.c index de6b6facc3..b566ff6130 100644 --- a/src/arch/armv7/tables.c +++ b/src/arch/armv7/tables.c @@ -29,6 +29,13 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +void __attribute__((weak)) get_cbmem_table(uint64_t *base, uint64_t *size) +{ + printk(BIOS_WARNING, "WARNING: you need to define get_cbmem_table for your board\n"); + *base = 0; + *size = 0; +} + void cbmem_arch_init(void) { } diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 9334839a62..d3a5f2163c 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -1,3 +1,5 @@ +romstage-y += cbmem.c + ramstage-y += boot.c ramstage-$(CONFIG_MULTIBOOT) += multiboot.c ramstage-y += gdt.c diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 6ec005d183..333ca55ccf 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -18,7 +18,28 @@ #include <console/console.h> #include <cbmem.h> +unsigned long __attribute__((weak)) get_top_of_ram(void) +{ + printk(BIOS_WARNING, "WARNING: you need to define get_top_of_ram() for your chipset\n"); + return 0; +} + #if !CONFIG_DYNAMIC_CBMEM +void get_cbmem_table(uint64_t *base, uint64_t *size) +{ + uint64_t top_of_ram = get_top_of_ram(); + + if (top_of_ram >= HIGH_MEMORY_SIZE) { + *base = top_of_ram - HIGH_MEMORY_SIZE; + *size = HIGH_MEMORY_SIZE; + } else { + *base = 0; + *size = 0; + } +} +#endif + +#if !CONFIG_DYNAMIC_CBMEM && !defined(__PRE_RAM__) /* This is for compatibility with old boards only. Any new chipset and board * must implement get_top_of_ram() for both romstage and ramstage to support * features like CAR_MIGRATION and CBMEM_CONSOLE. |