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authorStefan Reinauer <reinauer@chromium.org>2012-05-02 16:38:47 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-05-03 20:34:05 +0200
commitd4bacf962c9e6185e7259eb4f7830bffca197e71 (patch)
tree4359d4552355de365a6f3a2c9580e7d5143259d1 /src/arch
parent6870f0cc290c3aa106ccfc84ae62902b27eee4dc (diff)
downloadcoreboot-d4bacf962c9e6185e7259eb4f7830bffca197e71.tar.xz
Print some useful debugging information in PSS table creation
Change-Id: I1ec7a7e54513671331ac12f08d5f59161b72b0fd Example: PSS: 1900MHz power 35000 control 0x1300 status 0x1300 PSS: 1600MHz power 28468 control 0x1000 status 0x1000 PSS: 1400MHz power 24291 control 0xe00 status 0xe00 PSS: 1200MHz power 20340 control 0xc00 status 0xc00 PSS: 1000MHz power 16569 control 0xa00 status 0xa00 PSS: 800MHz power 12937 control 0x800 status 0x800 PSS: 1900MHz power 35000 control 0x1300 status 0x1300 PSS: 1600MHz power 28468 control 0x1000 status 0x1000 PSS: 1400MHz power 24291 control 0xe00 status 0xe00 PSS: 1200MHz power 20340 control 0xc00 status 0xc00 PSS: 1000MHz power 16569 control 0xa00 status 0xa00 PSS: 800MHz power 12937 control 0x800 status 0x800 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/994 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/boot/acpigen.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c
index 04aeddfc01..e7a297d357 100644
--- a/src/arch/x86/boot/acpigen.c
+++ b/src/arch/x86/boot/acpigen.c
@@ -426,8 +426,12 @@ int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat,
len += acpigen_write_dword(busmLat);
len += acpigen_write_dword(control);
len += acpigen_write_dword(status);
- //pkglen without the len opcode
+ // pkglen without the len opcode
acpigen_patch_len(len - 1);
+
+ printk(BIOS_DEBUG, "PSS: %uMHz power %u control 0x%x status 0x%x\n",
+ coreFreq, power, control, status);
+
return len;
}