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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-18 08:28:12 +0300
committerAngel Pons <th3fanbus@gmail.com>2020-07-28 10:37:28 +0000
commita4c0e1a51fc724680cb54a1f17813a67ab3b4250 (patch)
tree2f55b1fc4476c28880097c2c6f6ce11204259b11 /src/arch
parent470f319b9b33283fb85b466566410a1f4365e51c (diff)
downloadcoreboot-a4c0e1a51fc724680cb54a1f17813a67ab3b4250.tar.xz
ACPI S3: Clean up resume path
Remove the obscure path in source code, where ACPI S3 resume was prohibited and acpi_resume() would return and continue to BS_WRITE_TABLES. The condition when ACPI S3 would be prohibited needs to be checked early in romstage already. For the time being, there has been little interest to have CMOS option to disable ACPI S3 resume feature. Change-Id: If5105912759427f94f84d46d1a3141aa75cbd6ef Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/acpi_s3.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index 4872c07228..2802bd32ab 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -57,11 +57,6 @@ extern unsigned int __wakeup_size;
static void acpi_jump_to_wakeup(void *vector)
{
- if (!acpi_s3_resume_allowed()) {
- printk(BIOS_WARNING, "ACPI: S3 resume not allowed.\n");
- return;
- }
-
/* Copy wakeup trampoline in place. */
memcpy((void *)WAKEUP_BASE, &__wakeup, __wakeup_size);
@@ -76,7 +71,7 @@ void __weak mainboard_suspend_resume(void)
{
}
-void acpi_resume(void *wake_vec)
+void __noreturn acpi_resume(void *wake_vec)
{
/* Restore GNVS pointer in SMM if found. */
apm_control(APM_CNT_GNVS_UPDATE);
@@ -86,4 +81,6 @@ void acpi_resume(void *wake_vec)
post_code(POST_OS_RESUME);
acpi_jump_to_wakeup(wake_vec);
+
+ die("Failed the jump to wakeup vector\n");
}