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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 08:25:27 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-03-06 11:44:06 +0000 |
| commit | ad7758ca521bab7f1aaa0977516002f905cc0a67 (patch) | |
| tree | 731dfd804d94ac33ac5be833c22dd1454af3b8cd /src/arch | |
| parent | 6fefdfd106baff0cc74551e14d6344408271524a (diff) | |
| download | coreboot-ad7758ca521bab7f1aaa0977516002f905cc0a67.tar.xz | |
device/pci_ops: Change ramstage PCI accessor signatures
This reduces parameter passing and visibility of
parsing struct *dev to PCI bus:dev.fn.
Change-Id: Ie4232ca1db9cffdf21ed133143acfb7517577736
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/pci_ops_conf1.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 1180a82b0b..b1dadc3e23 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -19,50 +19,50 @@ */ #if !IS_ENABLED(CONFIG_PCI_IO_CFG_EXT) -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | (where & ~3)) +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | (where & ~3)) #else -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | ((where & 0xff) & ~3) |\ +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\ ((where & 0xf00)<<16)) #endif -static uint8_t pci_conf1_read_config8(int bus, int devfn, int where) +static uint8_t pci_conf1_read_config8(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inb(0xCFC + (where & 3)); } -static uint16_t pci_conf1_read_config16(int bus, int devfn, int where) +static uint16_t pci_conf1_read_config16(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inw(0xCFC + (where & 2)); } -static uint32_t pci_conf1_read_config32(int bus, int devfn, int where) +static uint32_t pci_conf1_read_config32(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inl(0xCFC); } -static void pci_conf1_write_config8(int bus, int devfn, int where, +static void pci_conf1_write_config8(struct device *dev, int where, uint8_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outb(value, 0xCFC + (where & 3)); } -static void pci_conf1_write_config16(int bus, int devfn, int where, +static void pci_conf1_write_config16(struct device *dev, int where, uint16_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outw(value, 0xCFC + (where & 2)); } -static void pci_conf1_write_config32(int bus, int devfn, int where, +static void pci_conf1_write_config32(struct device *dev, int where, uint32_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outl(value, 0xCFC); } |