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authorDaisuke Nojiri <dnojiri@chromium.org>2014-06-19 19:16:24 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-27 01:43:01 +0100
commitbcc1d422a2508dc54737fd941336c8cc09c51de1 (patch)
treec5912b1551b86641d4685be56f5e4578a086e281 /src/arch
parent77b1655d9bccd0c93cb1a6b86ecc98e2074504a3 (diff)
downloadcoreboot-bcc1d422a2508dc54737fd941336c8cc09c51de1.tar.xz
vboot2: implement select_firmware for pre-romstage verification
This patch has a basic structure of vboot2 integration. It supports only Nyans, which have bootblock architecture and romstage architecture are compatible from linker's perspective. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I4bbd4d0452604943b376bef20ea8a258820810aa Original-Reviewed-on: https://chromium-review.googlesource.com/204522 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit a6bce0cbed34def60386f3d9aece59e739740c58) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I63ddfbf463c8a83120828ec8ab994f8146f90001 Reviewed-on: http://review.coreboot.org/8160 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/Makefile.inc12
-rw-r--r--src/arch/arm/armv7/Makefile.inc12
-rw-r--r--src/arch/arm/bootblock.ld1
-rw-r--r--src/arch/arm/libgcc/Makefile.inc4
4 files changed, 29 insertions, 0 deletions
diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index 6f65a71c75..96c8b494b2 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -68,6 +68,18 @@ $(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(boo
endif # CONFIG_ARCH_BOOTBLOCK_ARM
###############################################################################
+# verification stage
+###############################################################################
+
+verstage-y += early_console.c
+verstage-y += div0.c
+verstage-y += eabi_compat.c
+verstage-y += memset.S
+verstage-y += memcpy.S
+verstage-y += memmove.S
+verstage-y += stages.c
+
+###############################################################################
# romstage
###############################################################################
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index 7e67178aa8..0919a93022 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -46,6 +46,18 @@ bootblock-S-ccopts += $(armv7_asm_flags)
endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
+################################################################################
+## verification stage
+################################################################################
+
+verstage-c-ccopts += $(armv7_flags)
+verstage-S-ccopts += $(armv7_asm_flags)
+verstage-y += cache.c
+verstage-y += cpu.S
+verstage-y += exception.c
+verstage-y += exception_asm.S
+verstage-y += mmu.c
+
###############################################################################
# romstage
###############################################################################
diff --git a/src/arch/arm/bootblock.ld b/src/arch/arm/bootblock.ld
index 150bf2df6b..c1a6ccf575 100644
--- a/src/arch/arm/bootblock.ld
+++ b/src/arch/arm/bootblock.ld
@@ -50,6 +50,7 @@ SECTIONS
} : to_load = 0xff
preram_cbmem_console = CONFIG_CBMEM_CONSOLE_PRERAM_BASE;
+ verstage_preram_cbmem_console = CONFIG_CBMEM_CONSOLE_PRERAM_BASE;
/DISCARD/ : {
*(.comment)
diff --git a/src/arch/arm/libgcc/Makefile.inc b/src/arch/arm/libgcc/Makefile.inc
index a1d325dfad..5e8858adc2 100644
--- a/src/arch/arm/libgcc/Makefile.inc
+++ b/src/arch/arm/libgcc/Makefile.inc
@@ -25,6 +25,10 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM),y)
bootblock-y += $(libgcc_files)
endif
+ifeq ($(CONFIG_ARCH_VERSTAGE_ARM),y)
+verstage-y += $(libgcc_files)
+endif
+
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
romstage-y += $(libgcc_files)
endif