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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-27 21:34:16 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-30 23:05:40 +0200
commit4cc8c70c3297a99449ca731a7ea34d3fbe32d614 (patch)
treebf3876b2e852be0804803349c53f14fe949083cd /src/arch
parenta403c687b16170966fa955ce55072edec84b5187 (diff)
downloadcoreboot-4cc8c70c3297a99449ca731a7ea34d3fbe32d614.tar.xz
Rework ACPI CST table generation
... in order to unify the Sandybridge and Lenovo implementations currently used in the tree. - use acpi_addr_t in acpigen_write_register() - use acpi_cstate_t for cstate tables (and fix up the x60 and t60) - drop cst_entry from acpigen.h Change-Id: Icb87418d44d355f607c4a67300107b40f40b3b3f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/943 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/boot/acpigen.c50
-rw-r--r--src/arch/x86/include/arch/acpi.h7
-rw-r--r--src/arch/x86/include/arch/acpigen.h18
3 files changed, 35 insertions, 40 deletions
diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c
index 6d2832ce2d..46d2413a3d 100644
--- a/src/arch/x86/boot/acpigen.c
+++ b/src/arch/x86/boot/acpigen.c
@@ -374,7 +374,7 @@ int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
return len + lenh;
}
-static int acpigen_write_CST_package_entry(struct cst_entry *entry)
+static int acpigen_write_CST_package_entry(acpi_cstate_t *cstate)
{
int len, len0;
char *start, *end;
@@ -382,19 +382,19 @@ static int acpigen_write_CST_package_entry(struct cst_entry *entry)
len0 = acpigen_write_package(4);
len = acpigen_write_resourcetemplate_header();
start = acpigen_get_current();
- acpigen_write_register(entry->type, entry->width, entry->offset, entry->addrsize, entry->address);
+ acpigen_write_register(&cstate->resource);
end = acpigen_get_current();
- len += end-start;
+ len += end - start;
len += acpigen_write_resourcetemplate_footer(len);
len += len0;
- len += acpigen_write_dword(entry->ctype);
- len += acpigen_write_dword(entry->latency);
- len += acpigen_write_dword(entry->power);
+ len += acpigen_write_dword(cstate->ctype);
+ len += acpigen_write_dword(cstate->latency);
+ len += acpigen_write_dword(cstate->power);
acpigen_patch_len(len - 1);
return len;
}
-int acpigen_write_CST_package(struct cst_entry *entry, int nentries)
+int acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries)
{
int len, lenh, lenp, i;
lenh = acpigen_write_name("_CST");
@@ -402,7 +402,7 @@ int acpigen_write_CST_package(struct cst_entry *entry, int nentries)
len = acpigen_write_dword(nentries);
for (i = 0; i < nentries; i++)
- len += acpigen_write_CST_package_entry(entry + i);
+ len += acpigen_write_CST_package_entry(cstate + i);
len += lenp;
acpigen_patch_len(len - 1);
@@ -434,25 +434,23 @@ int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size)
return 12;
}
-int acpigen_write_register(int type, int width, int offset, int addrsize, u64 address)
+int acpigen_write_register(acpi_addr_t *addr)
{
- acpigen_emit_byte(0x82);
- /* Byte 1+2: length (0x000c) */
- acpigen_emit_byte(0x0c);
- acpigen_emit_byte(0x00);
- /* bit1-7 are ignored */
- acpigen_emit_byte(type); /* FFixedHW */
- acpigen_emit_byte(width); /* register width */
- acpigen_emit_byte(offset); /* register offset */
- acpigen_emit_byte(addrsize); /* register address size */
- acpigen_emit_byte(address & 0xff); /* register address 0-7 */
- acpigen_emit_byte((address >> 8) & 0xff); /* register address 8-15 */
- acpigen_emit_byte((address >> 16) & 0xff); /* register address 16-23 */
- acpigen_emit_byte((address >> 24) & 0xff); /* register address 24-31 */
- acpigen_emit_byte((address >> 32) & 0xff); /* register address 32-39 */
- acpigen_emit_byte((address >> 40) & 0xff); /* register address 40-47 */
- acpigen_emit_byte((address >> 48) & 0xff); /* register address 48-55 */
- acpigen_emit_byte((address >> 56) & 0xff); /* register address 56-63 */
+ acpigen_emit_byte(0x82); /* Register Descriptor */
+ acpigen_emit_byte(0x0c); /* Register Length 7:0 */
+ acpigen_emit_byte(0x00); /* Register Length 15:8 */
+ acpigen_emit_byte(addr->space_id); /* Address Space ID */
+ acpigen_emit_byte(addr->bit_width); /* Register Bit Width */
+ acpigen_emit_byte(addr->bit_offset); /* Register Bit Offset */
+ acpigen_emit_byte(addr->resv); /* Register Access Size */
+ acpigen_emit_byte(addr->addrl & 0xff); /* Register Address Low */
+ acpigen_emit_byte((addr->addrl >> 8) & 0xff);
+ acpigen_emit_byte((addr->addrl >> 16) & 0xff);
+ acpigen_emit_byte((addr->addrl >> 24) & 0xff);
+ acpigen_emit_byte(addr->addrh & 0xff); /* Register Address High */
+ acpigen_emit_byte((addr->addrh >> 8) & 0xff);
+ acpigen_emit_byte((addr->addrh >> 16) & 0xff);
+ acpigen_emit_byte((addr->addrh >> 24) & 0xff);
return 15;
}
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index d1341e6a0f..913ea5872a 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -411,6 +411,13 @@ typedef struct acpi_hest_hen {
u32 error_threshold_win;
} __attribute__ ((packed)) acpi_hest_hen_t;
+typedef struct acpi_cstate {
+ u8 ctype;
+ u16 latency;
+ u32 power;
+ acpi_addr_t resource;
+} __attribute__ ((packed)) acpi_cstate_t;
+
/* These are implemented by the target port or north/southbridge. */
unsigned long write_acpi_tables(unsigned long addr);
unsigned long acpi_fill_madt(unsigned long current);
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index 8b5513ce5e..ea8cba7dd7 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -23,17 +23,7 @@
#include <assert.h>
#include <stdlib.h>
#include <stdint.h>
-
-struct cst_entry {
- int type;
- int width;
- int offset;
- int addrsize;
- u64 address;
- int ctype;
- int latency;
- int power;
-};
+#include <arch/acpi.h>
int acpigen_write_len_f(void);
void acpigen_patch_len(int len);
@@ -57,16 +47,16 @@ int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat
u32 control, u32 status);
typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
-int acpigen_write_CST_package(struct cst_entry *entry, int nentries);
+int acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size);
int acpigen_write_io16(u16 min, u16 max, u8 align, u8 len, u8 decode16);
-int acpigen_write_register(int type, int width, int offset, int addrsize, u64 address);
+int acpigen_write_register(acpi_addr_t *addr);
int acpigen_write_resourcetemplate_header(void);
int acpigen_write_resourcetemplate_footer(int len);
int acpigen_write_mainboard_resource_template(void);
int acpigen_write_mainboard_resources(const char *scope, const char *name);
-int get_cst_entries(struct cst_entry **);
+int get_cst_entries(acpi_cstate_t **);
#endif