summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2016-01-26 18:22:43 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-01-30 03:11:46 +0100
commit6be6c8f2820db761c09ee4bd2cb4e3fd76285207 (patch)
tree62481c112048742d71a1894d4c6af5723df34f36 /src/arch
parentf8e491339f685bc43a0b8812f9f00a2918ce7611 (diff)
downloadcoreboot-6be6c8f2820db761c09ee4bd2cb4e3fd76285207.tar.xz
arch/x86: Implement minimal bootblock for C_ENVIRONMENT_BOTOBLOCK
Some newer x86 systems can boot from non-memory-mapped boot media (e.g. EMMC). The bootblock may be backed by small amounts of SRAM, or other memory, similar to how most ARM chipsets work. In such cases, we may not have enough code space for romstage very early on. This means that CAR setup and early boot media (e.g. SPI, EMMC) drivers need to be implemented within the limited amount memory of storage available. Since the reset vector has to be contained in this early code memory, the bootblock is the best place to implement loading of other stages. Implement a bootblock which does the minimal initialization, up to, and including switch to protected mode. This then transfers control to platform-specific code. No stack is needed, and control is transferred via a "jmp" such that no stack operations are involved. Change-Id: I009b42b9a707cf11a74493bd4d8c189dc09b8ace Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: https://review.coreboot.org/13485 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/Makefile.inc1
-rw-r--r--src/arch/x86/bootblock_crt0.S55
2 files changed, 56 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 2942cae3fb..21084d3fd8 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -112,6 +112,7 @@ $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y)
+bootblock-y += bootblock_crt0.S
bootblock-y += memlayout.ld
ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
new file mode 100644
index 0000000000..926cda08a7
--- /dev/null
+++ b/src/arch/x86/bootblock_crt0.S
@@ -0,0 +1,55 @@
+/*
+ * This is the modern bootblock. It is used by platforms which select
+ * C_ENVIRONMENT_BOOTBLOCK, and it prepares the system for C environment runtime
+ * setup. The actual setup is done by hardware-specific code.
+ *
+ * It provides a bootflow similar to other architectures, and thus is considered
+ * to be the modern approach.
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#define CR0_MP (1 << 1)
+#define CR0_EM (1 << 2)
+
+#define CR4_OSFXSR (1 << 9)
+#define CR4_OSXMMEXCPT (1 << 10)
+
+/*
+ * Include the old code for reset vector and protected mode entry. That code has
+ * withstood the test of time.
+ */
+#include <arch/x86/prologue.inc>
+#include <cpu/x86/16bit/entry16.inc>
+#include <cpu/x86/16bit/reset16.inc>
+#include <cpu/x86/32bit/entry32.inc>
+
+
+bootblock_protected_mode_entry:
+ /* Save BIST result */
+ movd %eax, %mm0
+ /* Save an early timestamp */
+ rdtsc
+ movd %eax, %mm1
+ movd %edx, %mm2
+
+#if !IS_ENABLED(CONFIG_SSE)
+enable_sse:
+ mov %cr0, %eax
+ and $~CR0_EM, %ax /* Clear coprocessor emulation CR0.EM */
+ or $CR0_MP, %ax /* Set coprocessor monitoring CR0.MP */
+ mov %eax, %cr0
+ mov %cr4, %eax
+ or $(CR4_OSFXSR | CR4_OSXMMEXCPT), %ax
+ mov %eax, %cr4
+#endif /* IS_ENABLED(CONFIG_SSE) */
+
+ /* We're done. Now it's up to platform-specific code */
+ jmp bootblock_pre_c_entry