diff options
author | Patrick Rudolph <siro@das-labor.org> | 2019-10-25 08:09:33 +0200 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2019-10-29 19:41:19 +0000 |
commit | 776da0872efcc58543afbe32fc55202521ef0014 (patch) | |
tree | 8c7d4a952693a77634267779293a2458e51fdd84 /src/arch | |
parent | 5f2576089fca9b5b7c00d1dde1223d80fe9c9e2f (diff) | |
download | coreboot-776da0872efcc58543afbe32fc55202521ef0014.tar.xz |
arch/x86/*.S: use defines instead of hardcoded values
As preparation for x86_64 clean the assembly code and introduce
arch/ram_segs.h similar to existing arch/rom_segs.h.
Replace open coded segment values with the defines from the new
header.
Change-Id: Ib006cd4df59951335506b8153e9347450ec3403e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36321
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/c_start.S | 7 | ||||
-rw-r--r-- | src/arch/x86/include/arch/ram_segs.h | 25 |
2 files changed, 29 insertions, 3 deletions
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 32b848df9b..43d78020e1 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -12,6 +12,7 @@ */ #include <cpu/x86/post_code.h> +#include <arch/ram_segs.h> /* Place the stack in the bss section. It's not necessary to define it in the * the linker script. */ @@ -42,16 +43,16 @@ _start: cli lgdt %cs:gdtaddr #ifndef __x86_64__ - ljmp $0x10, $1f + ljmp $RAM_CODE_SEG, $1f #endif -1: movl $0x18, %eax +1: movl $RAM_DATA_SEG, %eax movl %eax, %ds movl %eax, %es movl %eax, %ss movl %eax, %fs movl %eax, %gs #ifdef __x86_64__ - mov $0x48, %ecx + mov $RAM_CODE_SEG64, %ecx call SetCodeSelector #endif diff --git a/src/arch/x86/include/arch/ram_segs.h b/src/arch/x86/include/arch/ram_segs.h new file mode 100644 index 0000000000..39d0c64896 --- /dev/null +++ b/src/arch/x86/include/arch/ram_segs.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef RAM_SEGS_H +#define RAM_SEGS_H + +#define RAM_CODE_SEG 0x10 +#define RAM_DATA_SEG 0x18 +#define RAM_CODE16_SEG 0x28 +#define RAM_DATA16_SEG 0x30 +#define RAM_CODE_ACPI_SEG 0x38 +#define RAM_DATA_ACPI_SEG 0x40 +#define RAM_CODE_SEG64 0x48 + +#endif /* RAM_SEGS_H */ |