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author | Yinghai Lu <yinghailu@gmail.com> | 2006-04-03 20:38:34 +0000 |
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committer | Yinghai Lu <yinghailu@gmail.com> | 2006-04-03 20:38:34 +0000 |
commit | 9a791dffeae2097aa0a18f645ce07acfed41b9bc (patch) | |
tree | 2d0359536fe3c1a0c313440b6be4ed09397dade9 /src/arch | |
parent | ffb7d8a31ae899f611235cd0a7f3579d34cd8cde (diff) | |
download | coreboot-9a791dffeae2097aa0a18f645ce07acfed41b9bc.tar.xz |
new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/i386/include/arch/romcc_io.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h index c0c2250f98..adda3f8ef8 100644 --- a/src/arch/i386/include/arch/romcc_io.h +++ b/src/arch/i386/include/arch/romcc_io.h @@ -178,6 +178,24 @@ static device_t pci_locate_device(unsigned pci_id, device_t dev) return PCI_DEV_INVALID; } +static device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus) +{ + device_t dev, last; + + dev = PCI_DEV(bus, 0, 0); + last = PCI_DEV(bus, 31, 7); + + for(; dev <=last; dev += PCI_DEV(0,0,1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) { + return dev; + } + } + return PCI_DEV_INVALID; +} + + /* Generic functions for pnp devices */ static inline __attribute__((always_inline)) void pnp_write_config(device_t dev, uint8_t reg, uint8_t value) |