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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-10-27 17:00:21 -0600 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-01 21:58:44 +0000 |
| commit | cbb78cd75251a6677636a08c43da7711adeca204 (patch) | |
| tree | 1dad059bbbec291b59c30295620081f40bd768c4 /src/arch | |
| parent | 14ef26b07b2f2d0150005e85de45af672e2b492d (diff) | |
| download | coreboot-cbb78cd75251a6677636a08c43da7711adeca204.tar.xz | |
amd/stoneyridge: Add definitions for various NB registers
Add #define values for the first MMIO base/limit, the first I/O
base/limit, and VGA enable registers.
Change-Id: I2c209224d356cf3f83a0ddb37974831611a89760
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch')
0 files changed, 0 insertions, 0 deletions