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authorZheng Bao <zheng.bao@amd.com>2009-08-25 04:12:55 +0000
committerZheng Bao <Zheng.Bao@amd.com>2009-08-25 04:12:55 +0000
commit1476a9ecc410ab1c8443332fc8e71fc5d16442e1 (patch)
tree836720358425cbbe96f79eb22fe295c921d2b455 /src/arch
parent4d7ae4d96ee0b3d902034bc6878a84fbfa0d45fb (diff)
downloadcoreboot-1476a9ecc410ab1c8443332fc8e71fc5d16442e1.tar.xz
Without this patch, if we only got a DIMM in Channel B, memory can not be
set up correctly. Now it can. Please test it. Moving "mct_AfterGetCLT(pMCTstat, pDCTstat, dct);" out of the "if" is the key point. Changing the Get_DIMMAddress_D(pDCTstat, i) to Get_DIMMAddress_D(pDCTstat, dct + i) doesnt seem to take any effect. But I believe this is what it should be. And a duplicated semicolon is removed. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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