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authorRichard Smith <smithbone@gmail.com>2006-04-23 23:12:21 +0000
committerRichard Smith <smithbone@gmail.com>2006-04-23 23:12:21 +0000
commit2a7352cb9dd7211c9a7edbef5145dd59df264644 (patch)
treefd50995bb28ef91e18abfb3fa833f1eb2e07c1f8 /src/arch
parent2f1980026865af7b11f27257c36b61d897932186 (diff)
downloadcoreboot-2a7352cb9dd7211c9a7edbef5145dd59df264644.tar.xz
Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()
Default is 255. This allows mainboard configs for working across various groups of boards that differ a device that may not loaded. If you search for a device that is not loaded and max buses is 255 then there can be up to a 8 second delay to search the entire PCI space. Board configs that know thier max bus can limit this search space. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/include/arch/romcc_io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h
index adda3f8ef8..983835a093 100644
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/i386/include/arch/romcc_io.h
@@ -168,7 +168,7 @@ static inline __attribute__((always_inline)) void pci_write_config32(device_t de
#define PCI_DEV_INVALID (0xffffffffU)
static device_t pci_locate_device(unsigned pci_id, device_t dev)
{
- for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+ for(; dev <= PCI_DEV(CONFIG_MAX_PCI_BUSES, 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
id = pci_read_config32(dev, 0);
if (id == pci_id) {