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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-08-15 16:28:48 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-09 19:07:34 +0100 |
| commit | a1ea82283d868af3681c3575722753f0789b941d (patch) | |
| tree | b78d98b3e04cd357a7fd4e0339a81dc9da3501d3 /src/arch | |
| parent | 0a1c2d62faed99edb5ffb53c2058cc6847568be0 (diff) | |
| download | coreboot-a1ea82283d868af3681c3575722753f0789b941d.tar.xz | |
Make coreboot use the offset parameter in cbfstool create
On Sandybridge and Ivybridge systems the firmware image has to
store a lot more than just coreboot, including:
- a firmware descriptor
- Intel Management Engine firmware
- MRC cache information
This option allows to limit the size of the CBFS portion in
the firmware image.
Change-Id: Ib87fd16fff2a6811cf898d611c966b90c939c50f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1770
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index e3fa42e0aa..868f159fee 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -65,7 +65,7 @@ prebuild-files = \ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) $(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) - $(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(objcbfs)/bootblock.bin + $(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(objcbfs)/bootblock.bin 64 $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) $(prebuild-files) true mv $@.tmp $@ else |