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authorRudolf Marek <r.marek@assembler.cz>2009-04-16 21:09:56 +0000
committerRudolf Marek <r.marek@assembler.cz>2009-04-16 21:09:56 +0000
commite4be46b4c39305e4224595f2655c2c9a439bc57c (patch)
treef241694f16a61d80116cc9131de945c0cb13301b /src/arch
parentf9fab37ecb9b900550a904d95c9962f0ba65358f (diff)
downloadcoreboot-e4be46b4c39305e4224595f2655c2c9a439bc57c.tar.xz
Following patch flushes the instruction queue when we set PE=0. This is normally
done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many thanks to Marc and Kevin to tell me how to fix it The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real mode to any EIP addresses ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/boot/wakeup.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/i386/boot/wakeup.S b/src/arch/i386/boot/wakeup.S
index 5985c8e1c0..7915fc38c5 100644
--- a/src/arch/i386/boot/wakeup.S
+++ b/src/arch/i386/boot/wakeup.S
@@ -45,6 +45,8 @@ reload_cs:
movl %cr0, %eax
andb $0xfe,%al
movl %eax, %cr0
+ ljmpl $0x0, $cpu_flushed
+cpu_flushed:
movw $0x0, %ax
movw %ax, %ds
movw %ax, %es