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authorChristian Walter <christian.walter@9elements.com>2019-07-14 15:47:23 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-08-06 12:08:34 +0000
commit26e0d4c98e3e145dcc4c9a53c3132c062f74aeec (patch)
tree46c98cddcb3a2e19b6b46f9c744b98168043b1df /src/arch
parent54226819429bb3d34b4914a69713046c52e03973 (diff)
downloadcoreboot-26e0d4c98e3e145dcc4c9a53c3132c062f74aeec.tar.xz
arch/x86/acpi.c: Change TPM2 ACPI Table to support CRB
Change the TPM2 ACPI Table to support CRB Interface when selected. Change-Id: Ide3af348fd4676f2d04e1d0b9ad83f9124e09dcc Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/acpi.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index e4ccd37abe..fdcbcd3fb5 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -386,10 +386,15 @@ static void acpi_create_tpm2(acpi_tpm2_t *tpm2)
/* Hard to detect for coreboot. Just set it to 0 */
tpm2->platform_class = 0;
- /* Must be set to 0 for TIS interface support */
- tpm2->control_area = 0;
- /* coreboot only supports the TIS interface driver. */
- tpm2->start_method = 6;
+ if (CONFIG(CRB_TPM)) {
+ /* Must be set to 7 for CRB Support */
+ tpm2->control_area = CONFIG_CRB_TPM_BASE_ADDRESS + 0x40;
+ tpm2->start_method = 7;
+ } else {
+ /* Must be set to 0 for FIFO interface support */
+ tpm2->control_area = 0;
+ tpm2->start_method = 6;
+ }
memset(tpm2->msp, 0, sizeof(tpm2->msp));
/* Fill the log area size and start address fields. */