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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2016-10-12 00:17:59 +0200
committerRonald G. Minnich <rminnich@gmail.com>2016-10-15 00:28:14 +0200
commit2f72a618f11ce9a0f5cc671c078e236ed78c8156 (patch)
treedd7f2448840bdcf1a35af3a5015379db95a79134 /src/arch
parent2c8f3bd91b54e85b4d2e24894ee8bbbfb9ad8a31 (diff)
downloadcoreboot-2f72a618f11ce9a0f5cc671c078e236ed78c8156.tar.xz
arch/riscv: Visually align trap frame information
The pointers printed on unaligned memory accesses are now aligned to those printed at the end of print_trap_information. Change-Id: Ifec1cb639036ce61b81fe8d0a9b14c00d5b2781a Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/16983 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/riscv/trap_handler.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index f52ccf7e12..59aa2214bc 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -172,8 +172,8 @@ static uint32_t fetch_instruction(uintptr_t vaddr) {
}
void handle_misaligned_load(trapframe *tf) {
- printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
- printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
+ printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
+ printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction);
@@ -202,8 +202,8 @@ void handle_misaligned_load(trapframe *tf) {
}
void handle_misaligned_store(trapframe *tf) {
- printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
- printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
+ printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
+ printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction);