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authorStefan Reinauer <stepan@coresystems.de>2010-01-05 13:03:02 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-05 13:03:02 +0000
commita0c68f864e9095a94c684183deb41f706e0bd1c3 (patch)
tree3dc2dd84c9c18ee1891ce89f884ee2d0e4486f12 /src/arch
parent1f807fd42f4c4d175c2af1357979fdf235f0be9a (diff)
downloadcoreboot-a0c68f864e9095a94c684183deb41f706e0bd1c3.tar.xz
* Explicitly add __PRE_RAM__ where it should be added.
* Don't implicitly add __PRE_RAM__ in romcc. Fixes intel/xe7501devkit Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/init/bootblock.c1
-rw-r--r--src/arch/i386/lib/failover.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/i386/init/bootblock.c b/src/arch/i386/init/bootblock.c
index 3cafef58f3..112a1953e3 100644
--- a/src/arch/i386/init/bootblock.c
+++ b/src/arch/i386/init/bootblock.c
@@ -1,3 +1,4 @@
+#define __PRE_RAM__
#if CONFIG_LOGICAL_CPUS && \
(defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT))
#include <cpu/x86/lapic/boot_cpu.c>
diff --git a/src/arch/i386/lib/failover.c b/src/arch/i386/lib/failover.c
index f7d183610e..7beee8af4e 100644
--- a/src/arch/i386/lib/failover.c
+++ b/src/arch/i386/lib/failover.c
@@ -19,6 +19,7 @@
*/
#define ASSEMBLY 1
+#define __PRE_RAM__
#include <arch/io.h>
#include "arch/romcc_io.h"