diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-07-10 17:04:25 -0500 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-04 20:04:46 +0100 |
| commit | bc772c3f3da6152d09e60be4e4e72a782cfa4201 (patch) | |
| tree | 338c7365cf97462708702cc1ac7951f417d79468 /src/arch | |
| parent | 00263d0d8ee23bbe60ea359ea9cb33d551688980 (diff) | |
| download | coreboot-bc772c3f3da6152d09e60be4e4e72a782cfa4201.tar.xz | |
arm64: Set 16 byte alignment and ramstage start address
To align with arm use the RAMSTAGE_BASE Kconfig option
for start of ramstage. Also, use 16-byte alignment for the
start and end of the sections. 4 bytes were previously used, but
it definitely seems more appropriate to at least have the heap
handing out 16-byte aligned pointers.
BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and booted through attempting to load payload
Original-Change-Id: I39329055696ae21a9ed1d9a64769981ab4dcdddd
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207432
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 6291f3bed705154743be78a881a26dfc9d041c5e)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ic280b4c6435c4f8e0e783fe5bd4694832ce9b550
Reviewed-on: http://review.coreboot.org/8588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/arm64/ramstage.ld | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/src/arch/arm64/ramstage.ld b/src/arch/arm64/ramstage.ld index 19c9309bcb..de13fcc519 100644 --- a/src/arch/arm64/ramstage.ld +++ b/src/arch/arm64/ramstage.ld @@ -32,7 +32,7 @@ PHDRS SECTIONS { - . = CONFIG_SYS_SDRAM_BASE; + . = CONFIG_RAMSTAGE_BASE; /* First we place the code and read only data (typically const declared). * This could theoretically be placed in rom. */ @@ -56,11 +56,11 @@ SECTIONS .rodata : { _rodata = .; - . = ALIGN(4); + . = ALIGN(16); console_drivers = .; KEEP(*(.rodata.console_drivers)); econsole_drivers = . ; - . = ALIGN(4); + . = ALIGN(16); pci_drivers = . ; KEEP(*(.rodata.pci_driver)); epci_drivers = . ; @@ -75,7 +75,7 @@ SECTIONS /* kevinh/Ispiri - Added an align, because the objcopy tool * incorrectly converts sections that are not long word aligned. */ - . = ALIGN(4); + . = ALIGN(16); _erodata = .; } @@ -100,6 +100,7 @@ SECTIONS *(.bss) *(.sbss) *(COMMON) + . = ALIGN(16); } _ebss = .; _end = .; @@ -108,13 +109,13 @@ SECTIONS * this line. */ - _heap = .; - .heap . : { - /* Reserve CONFIG_HEAP_SIZE bytes for the heap */ - . = CONFIG_HEAP_SIZE ; - . = ALIGN(4); - } - _eheap = .; + _heap = .; + .heap . : { + /* Reserve CONFIG_HEAP_SIZE bytes for the heap */ + . = CONFIG_HEAP_SIZE ; + . = ALIGN(16); + } + _eheap = .; /* arm64 chipsets need to define CONFIG_RAMSTAGE_STACK_(TOP|BOTTOM) */ _stack = CONFIG_RAMSTAGE_STACK_BOTTOM; |